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b01-c48-ponlytest-vgeneral
valveboard/firmware/simulation/modelsim/PF1.vo
Miaow 7bbb183258 init branch
2021-11-22 00:34:34 +08:00

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// Copyright (C) 2020 Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions
// and other software and tools, and any partner logic
// functions, and any output files from any of the foregoing
// (including device programming or simulation files), and any
// associated documentation or information are expressly subject
// to the terms and conditions of the Intel Program License
// Subscription Agreement, the Intel Quartus Prime License Agreement,
// the Intel FPGA IP License Agreement, or other applicable license
// agreement, including, without limitation, that your use is for
// the sole purpose of programming logic devices manufactured by
// Intel and sold by Intel or its authorized distributors. Please
// refer to the applicable agreement for further details, at
// https://fpgasoftware.intel.com/eula.
// VENDOR "Altera"
// PROGRAM "Quartus Prime"
// VERSION "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition"
// DATE "11/11/2021 17:04:11"
//
// Device: Altera EPM1270T144C5 Package TQFP144
//
//
// This Verilog file should be used for ModelSim-Altera (Verilog) only
//
`timescale 1 ps/ 1 ps
module PF1 (
sys_clk,
rst_n,
line_sclk,
line_sen,
line_sdata,
signal_high_voltage,
signal_low_voltage);
input sys_clk;
input rst_n;
input line_sclk;
input line_sen;
input line_sdata;
output [47:0] signal_high_voltage;
output [47:0] signal_low_voltage;
// Design Ports Information
wire gnd;
wire vcc;
wire unknown;
assign gnd = 1'b0;
assign vcc = 1'b1;
assign unknown = 1'bx;
tri1 devclrn;
tri1 devpor;
tri1 devoe;
// synopsys translate_off
initial $sdf_annotate("PF1_v.sdo");
// synopsys translate_on
wire \sys_clk~combout ;
wire \rst_n~combout ;
wire \line_sclk~combout ;
wire \Equal0~0 ;
wire \Equal0~1 ;
wire \fault_counter[0]~23 ;
wire \fault_counter[1]~25 ;
wire \fault_counter[1]~25COUT1_71 ;
wire \fault_counter[2]~27 ;
wire \fault_counter[2]~27COUT1_72 ;
wire \fault_counter[3]~29 ;
wire \fault_counter[3]~29COUT1_73 ;
wire \fault_counter[4]~31 ;
wire \fault_counter[4]~31COUT1_74 ;
wire \fault_counter[5]~33 ;
wire \fault_counter[6]~35 ;
wire \fault_counter[6]~35COUT1_75 ;
wire \fault_counter[7]~37 ;
wire \fault_counter[7]~37COUT1_76 ;
wire \fault_counter[8]~21 ;
wire \fault_counter[8]~21COUT1_77 ;
wire \fault_counter[9]~19 ;
wire \fault_counter[9]~19COUT1_78 ;
wire \fault_counter[10]~41 ;
wire \fault_counter[11]~39 ;
wire \fault_counter[11]~39COUT1_79 ;
wire \fault_counter[12]~13 ;
wire \fault_counter[12]~13COUT1_80 ;
wire \fault_counter[13]~11 ;
wire \fault_counter[13]~11COUT1_81 ;
wire \fault_counter[14]~15 ;
wire \fault_counter[14]~15COUT1_82 ;
wire \fault_counter[15]~17 ;
wire \fault_counter[16]~9 ;
wire \fault_counter[16]~9COUT1_83 ;
wire \fault_counter[17]~43 ;
wire \fault_counter[17]~43COUT1_84 ;
wire \fault_counter[18]~45 ;
wire \fault_counter[18]~45COUT1_85 ;
wire \fault_counter[19]~47 ;
wire \fault_counter[19]~47COUT1_86 ;
wire \fault_counter[20]~5 ;
wire \fault_counter[21]~7 ;
wire \fault_counter[21]~7COUT1_87 ;
wire \fault_counter[22]~49 ;
wire \fault_counter[22]~49COUT1_88 ;
wire \fault_counter[23]~51 ;
wire \fault_counter[23]~51COUT1_89 ;
wire \fault_counter[24]~3 ;
wire \fault_counter[24]~3COUT1_90 ;
wire \fault_counter[25]~53 ;
wire \fault_counter[26]~55 ;
wire \fault_counter[26]~55COUT1_91 ;
wire \fault_counter[27]~57 ;
wire \fault_counter[27]~57COUT1_92 ;
wire \fault_counter[28]~59 ;
wire \fault_counter[28]~59COUT1_93 ;
wire \fault_counter[29]~62 ;
wire \fault_counter[29]~62COUT1_94 ;
wire \fault_counter[30]~64 ;
wire \fault_counter[26]~60_combout ;
wire \fault_counter[26]~67_combout ;
wire \fault_flag~7_combout ;
wire \LessThan2~8_combout ;
wire \LessThan2~9_combout ;
wire \LessThan2~6_combout ;
wire \LessThan2~2_combout ;
wire \LessThan2~4_combout ;
wire \LessThan2~3_combout ;
wire \LessThan2~5_combout ;
wire \LessThan2~0_combout ;
wire \LessThan2~1_combout ;
wire \LessThan2~7_combout ;
wire \fault_counter[26]~68_combout ;
wire \fault_counter[26]~69_combout ;
wire \fault_flag~10_combout ;
wire \fault_flag~6_combout ;
wire \fault_flag~2_combout ;
wire \fault_flag~3_combout ;
wire \fault_flag~4_combout ;
wire \fault_flag~5_combout ;
wire \fault_flag~8_combout ;
wire \fault_flag~9_combout ;
wire \fault_flag[1][0]~regout ;
wire \line_sen~combout ;
wire \Equal1~0 ;
wire \Equal1~1 ;
wire \Equal2~0 ;
wire \Equal2~1 ;
wire \filter_line_sen~regout ;
wire \negedge_line_sen~regout ;
wire \i[26]~69_combout ;
wire \i[0]~9 ;
wire \i[1]~11 ;
wire \i[1]~11COUT1_71 ;
wire \i[2]~13 ;
wire \i[2]~13COUT1_72 ;
wire \i[3]~15 ;
wire \i[3]~15COUT1_73 ;
wire \posedge_line_sclk~regout ;
wire \i[26]~68_combout ;
wire \i[4]~5 ;
wire \i[4]~5COUT1_74 ;
wire \i[5]~7 ;
wire \i[6]~17 ;
wire \i[6]~17COUT1_75 ;
wire \i[7]~19 ;
wire \i[7]~19COUT1_76 ;
wire \i[8]~29 ;
wire \i[8]~29COUT1_77 ;
wire \i[9]~31 ;
wire \i[9]~31COUT1_78 ;
wire \i[10]~21 ;
wire \i[11]~23 ;
wire \i[11]~23COUT1_79 ;
wire \i[12]~25 ;
wire \i[12]~25COUT1_80 ;
wire \i[13]~27 ;
wire \i[13]~27COUT1_81 ;
wire \i[14]~33 ;
wire \i[14]~33COUT1_82 ;
wire \i[15]~35 ;
wire \i[16]~37 ;
wire \i[16]~37COUT1_83 ;
wire \recv_complete~4_combout ;
wire \i[17]~39 ;
wire \i[17]~39COUT1_84 ;
wire \i[18]~41 ;
wire \i[18]~41COUT1_85 ;
wire \i[19]~43 ;
wire \i[19]~43COUT1_86 ;
wire \i[20]~45 ;
wire \recv_complete~5_combout ;
wire \recv_complete~1_combout ;
wire \recv_complete~2_combout ;
wire \recv_complete~3_combout ;
wire \i[21]~47 ;
wire \i[21]~47COUT1_87 ;
wire \i[22]~49 ;
wire \i[22]~49COUT1_88 ;
wire \i[23]~51 ;
wire \i[23]~51COUT1_89 ;
wire \i[24]~53 ;
wire \i[24]~53COUT1_90 ;
wire \i[25]~55 ;
wire \i[26]~57 ;
wire \i[26]~57COUT1_91 ;
wire \i[27]~59 ;
wire \i[27]~59COUT1_92 ;
wire \i[28]~61 ;
wire \i[28]~61COUT1_93 ;
wire \i[29]~63 ;
wire \i[29]~63COUT1_94 ;
wire \i[30]~65 ;
wire \recv_complete~7_combout ;
wire \recv_complete~6_combout ;
wire \recv_complete~8_combout ;
wire \recv_complete~9_combout ;
wire \recv_complete~0_combout ;
wire \fault_flag~0_combout ;
wire \fault_flag[0][0]~regout ;
wire \cnt_for_high_voltage_time~128_combout ;
wire \line_sdata~combout ;
wire \fiter_line_sdata~regout ;
wire \Decoder0~65 ;
wire \Decoder0~101_combout ;
wire \recv_complete~10_combout ;
wire \recv_complete~11_combout ;
wire \cache2_line_sdata[45]~50_combout ;
wire \enable_count_high_voltage_time~regout ;
wire posedge_enable_count_high_voltage_time;
wire \Add2~0_combout ;
wire \cnt_for_high_voltage_time[18]~129_combout ;
wire \Add2~2 ;
wire \Add2~155_combout ;
wire \Add2~157 ;
wire \Add2~157COUT1_161 ;
wire \Add2~150_combout ;
wire \Add2~152 ;
wire \Add2~152COUT1_162 ;
wire \Add2~145_combout ;
wire \Add2~147 ;
wire \Add2~147COUT1_163 ;
wire \Add2~140_combout ;
wire \Add2~142 ;
wire \Add2~142COUT1_164 ;
wire \Add2~135_combout ;
wire \Add2~137 ;
wire \Add2~130_combout ;
wire \Add2~132 ;
wire \Add2~132COUT1_165 ;
wire \Add2~125_combout ;
wire \Add2~127 ;
wire \Add2~127COUT1_166 ;
wire \Add2~120_combout ;
wire \Add2~122 ;
wire \Add2~122COUT1_167 ;
wire \Add2~115_combout ;
wire \Add2~117 ;
wire \Add2~117COUT1_168 ;
wire \Add2~110_combout ;
wire \Add2~112 ;
wire \Add2~105_combout ;
wire \Equal4~6_combout ;
wire \Add2~107 ;
wire \Add2~107COUT1_169 ;
wire \Add2~100_combout ;
wire \Add2~102 ;
wire \Add2~102COUT1_170 ;
wire \Add2~95_combout ;
wire \Add2~97 ;
wire \Add2~97COUT1_171 ;
wire \Add2~90_combout ;
wire \Add2~92 ;
wire \Add2~92COUT1_172 ;
wire \Add2~85_combout ;
wire \Equal4~5_combout ;
wire \Equal4~7_combout ;
wire \Equal4~8_combout ;
wire \Add2~87 ;
wire \Add2~80_combout ;
wire \Add2~82 ;
wire \Add2~82COUT1_173 ;
wire \Add2~75_combout ;
wire \Add2~77 ;
wire \Add2~77COUT1_174 ;
wire \Add2~70_combout ;
wire \Add2~72 ;
wire \Add2~72COUT1_175 ;
wire \Add2~65_combout ;
wire \Equal4~3_combout ;
wire \Add2~67 ;
wire \Add2~67COUT1_176 ;
wire \Add2~60_combout ;
wire \Add2~62 ;
wire \Add2~55_combout ;
wire \Add2~57 ;
wire \Add2~57COUT1_177 ;
wire \Add2~50_combout ;
wire \Add2~52 ;
wire \Add2~52COUT1_178 ;
wire \Add2~45_combout ;
wire \Add2~47 ;
wire \Add2~47COUT1_179 ;
wire \Add2~40_combout ;
wire \Add2~42 ;
wire \Add2~42COUT1_180 ;
wire \Add2~35_combout ;
wire \Add2~37 ;
wire \Add2~30_combout ;
wire \Add2~32 ;
wire \Add2~32COUT1_181 ;
wire \Add2~25_combout ;
wire \Equal4~1_combout ;
wire \Equal4~2_combout ;
wire \Add2~27 ;
wire \Add2~27COUT1_182 ;
wire \Add2~20_combout ;
wire \Add2~22 ;
wire \Add2~22COUT1_183 ;
wire \Add2~15_combout ;
wire \Add2~17 ;
wire \Add2~17COUT1_184 ;
wire \Add2~10_combout ;
wire \Add2~12 ;
wire \Add2~5_combout ;
wire \Equal4~0_combout ;
wire \Equal4~4_combout ;
wire \Equal4~9_combout ;
wire \Equal4~10_combout ;
wire \is_high_voltage_time~regout ;
wire \signal_high_voltage[0]~reg0_regout ;
wire \Decoder0~66_combout ;
wire \signal_high_voltage[1]~reg0_regout ;
wire \Decoder0~64_combout ;
wire \always3~0_combout ;
wire \Decoder0~68_combout ;
wire \Decoder0~102_combout ;
wire \signal_high_voltage[2]~reg0_regout ;
wire \Decoder0~69_combout ;
wire \Decoder0~103_combout ;
wire \signal_high_voltage[3]~reg0_regout ;
wire \Decoder0~70_combout ;
wire \Decoder0~71_combout ;
wire \signal_high_voltage[4]~reg0_regout ;
wire \Decoder0~72_combout ;
wire \Decoder0~104_combout ;
wire \signal_high_voltage[5]~reg0_regout ;
wire \Decoder0~73_combout ;
wire \Decoder0~105_combout ;
wire \signal_high_voltage[6]~reg0_regout ;
wire \Decoder0~106_combout ;
wire \signal_high_voltage[7]~reg0_regout ;
wire \Decoder0~107_combout ;
wire \signal_high_voltage[8]~reg0_regout ;
wire \Decoder0~108_combout ;
wire \signal_high_voltage[9]~reg0_regout ;
wire \Decoder0~74_combout ;
wire \Decoder0~109_combout ;
wire \signal_high_voltage[10]~reg0_regout ;
wire \Decoder0~110_combout ;
wire \signal_high_voltage[11]~reg0_regout ;
wire \Decoder0~76_combout ;
wire \signal_high_voltage[12]~reg0_regout ;
wire \Decoder0~111_combout ;
wire \signal_high_voltage[13]~reg0_regout ;
wire \Decoder0~77_combout ;
wire \signal_high_voltage[14]~reg0_regout ;
wire \Decoder0~112_combout ;
wire \signal_high_voltage[15]~reg0_regout ;
wire \Decoder0~78_combout ;
wire \Decoder0~113_combout ;
wire \signal_high_voltage[16]~reg0_regout ;
wire \Decoder0~79_combout ;
wire \Decoder0~80_combout ;
wire \signal_high_voltage[17]~reg0_regout ;
wire \Decoder0~114_combout ;
wire \signal_high_voltage[18]~reg0_regout ;
wire \Decoder0~67_combout ;
wire \Decoder0~81_combout ;
wire \signal_high_voltage[19]~reg0_regout ;
wire \Decoder0~82_combout ;
wire \Decoder0~115_combout ;
wire \Decoder0~83_combout ;
wire \signal_high_voltage[20]~reg0_regout ;
wire \Decoder0~84_combout ;
wire \signal_high_voltage[21]~reg0_regout ;
wire \Decoder0~116_combout ;
wire \signal_high_voltage[22]~reg0_regout ;
wire \Decoder0~85_combout ;
wire \signal_high_voltage[23]~reg0_regout ;
wire \Decoder0~86_combout ;
wire \signal_high_voltage[24]~reg0_regout ;
wire \Decoder0~75_combout ;
wire \Decoder0~87_combout ;
wire \signal_high_voltage[25]~reg0_regout ;
wire \Decoder0~117_combout ;
wire \signal_high_voltage[26]~reg0_regout ;
wire \Decoder0~88_combout ;
wire \signal_high_voltage[27]~reg0_regout ;
wire \Decoder0~89_combout ;
wire \signal_high_voltage[28]~reg0_regout ;
wire \Decoder0~90_combout ;
wire \signal_high_voltage[29]~reg0_regout ;
wire \Decoder0~91_combout ;
wire \signal_high_voltage[30]~reg0_regout ;
wire \Decoder0~92_combout ;
wire \signal_high_voltage[31]~reg0_regout ;
wire \Decoder0~118_combout ;
wire \signal_high_voltage[32]~reg0_regout ;
wire \Decoder0~93_combout ;
wire \signal_high_voltage[33]~reg0_regout ;
wire \Decoder0~119_combout ;
wire \signal_high_voltage[34]~reg0_regout ;
wire \Decoder0~120_combout ;
wire \signal_high_voltage[35]~reg0_regout ;
wire \Decoder0~94_combout ;
wire \Decoder0~95_combout ;
wire \signal_high_voltage[36]~reg0_regout ;
wire \Decoder0~121_combout ;
wire \signal_high_voltage[37]~reg0_regout ;
wire \Decoder0~122_combout ;
wire \signal_high_voltage[38]~reg0_regout ;
wire \Decoder0~123_combout ;
wire \signal_high_voltage[39]~reg0_regout ;
wire \Decoder0~96_combout ;
wire \signal_high_voltage[40]~reg0_regout ;
wire \Decoder0~124_combout ;
wire \signal_high_voltage[41]~reg0_regout ;
wire \Decoder0~125_combout ;
wire \signal_high_voltage[42]~reg0_regout ;
wire \Decoder0~126_combout ;
wire \signal_high_voltage[43]~reg0_regout ;
wire \Decoder0~97_combout ;
wire \signal_high_voltage[44]~reg0_regout ;
wire \Decoder0~98_combout ;
wire \signal_high_voltage[45]~reg0_regout ;
wire \Decoder0~99_combout ;
wire \signal_high_voltage[46]~reg0_regout ;
wire \Decoder0~100_combout ;
wire \signal_high_voltage[47]~reg0_regout ;
wire \signal_low_voltage[0]~reg0_regout ;
wire \signal_low_voltage[1]~reg0_regout ;
wire \signal_low_voltage[2]~reg0_regout ;
wire \signal_low_voltage[3]~reg0_regout ;
wire \signal_low_voltage[4]~reg0_regout ;
wire \signal_low_voltage[5]~reg0_regout ;
wire \signal_low_voltage[6]~reg0_regout ;
wire \signal_low_voltage[7]~reg0_regout ;
wire \signal_low_voltage[8]~reg0_regout ;
wire \signal_low_voltage[9]~reg0_regout ;
wire \signal_low_voltage[10]~reg0_regout ;
wire \signal_low_voltage[11]~reg0_regout ;
wire \signal_low_voltage[12]~reg0_regout ;
wire \signal_low_voltage[13]~reg0_regout ;
wire \signal_low_voltage[14]~reg0_regout ;
wire \signal_low_voltage[15]~reg0_regout ;
wire \signal_low_voltage[16]~reg0_regout ;
wire \signal_low_voltage[17]~reg0_regout ;
wire \signal_low_voltage[18]~reg0_regout ;
wire \signal_low_voltage[19]~reg0_regout ;
wire \signal_low_voltage[20]~reg0_regout ;
wire \signal_low_voltage[21]~reg0_regout ;
wire \signal_low_voltage[22]~reg0_regout ;
wire \signal_low_voltage[23]~reg0_regout ;
wire \signal_low_voltage[24]~reg0_regout ;
wire \signal_low_voltage[25]~reg0_regout ;
wire \signal_low_voltage[26]~reg0_regout ;
wire \signal_low_voltage[27]~reg0_regout ;
wire \signal_low_voltage[28]~reg0_regout ;
wire \signal_low_voltage[29]~reg0_regout ;
wire \signal_low_voltage[30]~reg0_regout ;
wire \signal_low_voltage[31]~reg0_regout ;
wire \signal_low_voltage[32]~reg0_regout ;
wire \signal_low_voltage[33]~reg0_regout ;
wire \signal_low_voltage[34]~reg0_regout ;
wire \signal_low_voltage[35]~reg0_regout ;
wire \signal_low_voltage[36]~reg0_regout ;
wire \signal_low_voltage[37]~reg0_regout ;
wire \signal_low_voltage[38]~reg0_regout ;
wire \signal_low_voltage[39]~reg0_regout ;
wire \signal_low_voltage[40]~reg0_regout ;
wire \signal_low_voltage[41]~reg0_regout ;
wire \signal_low_voltage[42]~reg0_regout ;
wire \signal_low_voltage[43]~reg0_regout ;
wire \signal_low_voltage[44]~reg0_regout ;
wire \signal_low_voltage[45]~reg0_regout ;
wire \signal_low_voltage[46]~reg0_regout ;
wire \signal_low_voltage[47]~reg0_regout ;
wire [47:0] cache2_line_sdata;
wire [1:0] cache_enable_count_high_voltage_time;
wire [31:0] i;
wire [4:0] cache_line_sen;
wire [31:0] fault_counter;
wire [4:0] cache_line_sclk;
wire [47:0] cache_line_sdata;
wire [31:0] cnt_for_high_voltage_time;
wire [4:0] tmp_cache_line_sdata;
// Location: PIN_18, I/O Standard: 3.3-V LVTTL, Current Strength: Default
maxii_io \sys_clk~I (
.datain(gnd),
.oe(gnd),
.combout(\sys_clk~combout ),
.padio(sys_clk));
// synopsys translate_off
defparam \sys_clk~I .operation_mode = "input";
// synopsys translate_on
// Location: PIN_37, I/O Standard: 3.3-V LVTTL, Current Strength: Default
maxii_io \rst_n~I (
.datain(gnd),
.oe(gnd),
.combout(\rst_n~combout ),
.padio(rst_n));
// synopsys translate_off
defparam \rst_n~I .operation_mode = "input";
// synopsys translate_on
// Location: PIN_40, I/O Standard: 3.3-V LVTTL, Current Strength: Default
maxii_io \line_sclk~I (
.datain(gnd),
.oe(gnd),
.combout(\line_sclk~combout ),
.padio(line_sclk));
// synopsys translate_off
defparam \line_sclk~I .operation_mode = "input";
// synopsys translate_on
// Location: LC_X2_Y7_N1
maxii_lcell \cache_line_sclk[0] (
// Equation(s):
// \Equal0~1 = (\line_sclk~combout & (((cache_line_sclk[0] & \Equal0~0 ))))
// cache_line_sclk[0] = DFFEAS(\Equal0~1 , GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , \line_sclk~combout , , , VCC)
.clk(\sys_clk~combout ),
.dataa(\line_sclk~combout ),
.datab(vcc),
.datac(\line_sclk~combout ),
.datad(\Equal0~0 ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal0~1 ),
.regout(cache_line_sclk[0]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sclk[0] .lut_mask = "a000";
defparam \cache_line_sclk[0] .operation_mode = "normal";
defparam \cache_line_sclk[0] .output_mode = "reg_and_comb";
defparam \cache_line_sclk[0] .register_cascade_mode = "off";
defparam \cache_line_sclk[0] .sum_lutc_input = "qfbk";
defparam \cache_line_sclk[0] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X1_Y7_N7
maxii_lcell \cache_line_sclk[1] (
// Equation(s):
// cache_line_sclk[1] = DFFEAS((((cache_line_sclk[0]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(cache_line_sclk[0]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sclk[1]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sclk[1] .lut_mask = "ff00";
defparam \cache_line_sclk[1] .operation_mode = "normal";
defparam \cache_line_sclk[1] .output_mode = "reg_only";
defparam \cache_line_sclk[1] .register_cascade_mode = "off";
defparam \cache_line_sclk[1] .sum_lutc_input = "datac";
defparam \cache_line_sclk[1] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X1_Y7_N8
maxii_lcell \cache_line_sclk[2] (
// Equation(s):
// cache_line_sclk[2] = DFFEAS(GND, GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , cache_line_sclk[1], , , VCC)
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(cache_line_sclk[1]),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sclk[2]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sclk[2] .lut_mask = "0000";
defparam \cache_line_sclk[2] .operation_mode = "normal";
defparam \cache_line_sclk[2] .output_mode = "reg_only";
defparam \cache_line_sclk[2] .register_cascade_mode = "off";
defparam \cache_line_sclk[2] .sum_lutc_input = "datac";
defparam \cache_line_sclk[2] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X1_Y7_N6
maxii_lcell \cache_line_sclk[3] (
// Equation(s):
// cache_line_sclk[3] = DFFEAS((((cache_line_sclk[2]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(cache_line_sclk[2]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sclk[3]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sclk[3] .lut_mask = "ff00";
defparam \cache_line_sclk[3] .operation_mode = "normal";
defparam \cache_line_sclk[3] .output_mode = "reg_only";
defparam \cache_line_sclk[3] .register_cascade_mode = "off";
defparam \cache_line_sclk[3] .sum_lutc_input = "datac";
defparam \cache_line_sclk[3] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X1_Y7_N0
maxii_lcell \cache_line_sclk[4] (
// Equation(s):
// \Equal0~0 = (cache_line_sclk[3] & (cache_line_sclk[1] & (!cache_line_sclk[4] & cache_line_sclk[2])))
.clk(\sys_clk~combout ),
.dataa(cache_line_sclk[3]),
.datab(cache_line_sclk[1]),
.datac(cache_line_sclk[3]),
.datad(cache_line_sclk[2]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal0~0 ),
.regout(cache_line_sclk[4]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sclk[4] .lut_mask = "0800";
defparam \cache_line_sclk[4] .operation_mode = "normal";
defparam \cache_line_sclk[4] .output_mode = "comb_only";
defparam \cache_line_sclk[4] .register_cascade_mode = "off";
defparam \cache_line_sclk[4] .sum_lutc_input = "qfbk";
defparam \cache_line_sclk[4] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X3_Y7_N4
maxii_lcell \fault_counter[0] (
// Equation(s):
// fault_counter[0] = DFFEAS(((!fault_counter[0])), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
// \fault_counter[0]~23 = CARRY(((fault_counter[0])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[0]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[0]),
.cout(\fault_counter[0]~23 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[0] .lut_mask = "33cc";
defparam \fault_counter[0] .operation_mode = "arithmetic";
defparam \fault_counter[0] .output_mode = "reg_only";
defparam \fault_counter[0] .register_cascade_mode = "off";
defparam \fault_counter[0] .sum_lutc_input = "datac";
defparam \fault_counter[0] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X3_Y7_N5
maxii_lcell \fault_counter[1] (
// Equation(s):
// fault_counter[1] = DFFEAS(fault_counter[1] $ ((((\fault_counter[0]~23 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
// \fault_counter[1]~25 = CARRY(((!\fault_counter[0]~23 )) # (!fault_counter[1]))
// \fault_counter[1]~25COUT1_71 = CARRY(((!\fault_counter[0]~23 )) # (!fault_counter[1]))
.clk(\sys_clk~combout ),
.dataa(fault_counter[1]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[0]~23 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[1]),
.cout(),
.cout0(\fault_counter[1]~25 ),
.cout1(\fault_counter[1]~25COUT1_71 ));
// synopsys translate_off
defparam \fault_counter[1] .cin_used = "true";
defparam \fault_counter[1] .lut_mask = "5a5f";
defparam \fault_counter[1] .operation_mode = "arithmetic";
defparam \fault_counter[1] .output_mode = "reg_only";
defparam \fault_counter[1] .register_cascade_mode = "off";
defparam \fault_counter[1] .sum_lutc_input = "cin";
defparam \fault_counter[1] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X3_Y7_N6
maxii_lcell \fault_counter[2] (
// Equation(s):
// fault_counter[2] = DFFEAS(fault_counter[2] $ ((((!(!\fault_counter[0]~23 & \fault_counter[1]~25 ) # (\fault_counter[0]~23 & \fault_counter[1]~25COUT1_71 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[2]~27 = CARRY((fault_counter[2] & ((!\fault_counter[1]~25 ))))
// \fault_counter[2]~27COUT1_72 = CARRY((fault_counter[2] & ((!\fault_counter[1]~25COUT1_71 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[2]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[0]~23 ),
.cin0(\fault_counter[1]~25 ),
.cin1(\fault_counter[1]~25COUT1_71 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[2]),
.cout(),
.cout0(\fault_counter[2]~27 ),
.cout1(\fault_counter[2]~27COUT1_72 ));
// synopsys translate_off
defparam \fault_counter[2] .cin0_used = "true";
defparam \fault_counter[2] .cin1_used = "true";
defparam \fault_counter[2] .cin_used = "true";
defparam \fault_counter[2] .lut_mask = "a50a";
defparam \fault_counter[2] .operation_mode = "arithmetic";
defparam \fault_counter[2] .output_mode = "reg_only";
defparam \fault_counter[2] .register_cascade_mode = "off";
defparam \fault_counter[2] .sum_lutc_input = "cin";
defparam \fault_counter[2] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X3_Y7_N7
maxii_lcell \fault_counter[3] (
// Equation(s):
// fault_counter[3] = DFFEAS((fault_counter[3] $ (((!\fault_counter[0]~23 & \fault_counter[2]~27 ) # (\fault_counter[0]~23 & \fault_counter[2]~27COUT1_72 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[3]~29 = CARRY(((!\fault_counter[2]~27 ) # (!fault_counter[3])))
// \fault_counter[3]~29COUT1_73 = CARRY(((!\fault_counter[2]~27COUT1_72 ) # (!fault_counter[3])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[3]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[0]~23 ),
.cin0(\fault_counter[2]~27 ),
.cin1(\fault_counter[2]~27COUT1_72 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[3]),
.cout(),
.cout0(\fault_counter[3]~29 ),
.cout1(\fault_counter[3]~29COUT1_73 ));
// synopsys translate_off
defparam \fault_counter[3] .cin0_used = "true";
defparam \fault_counter[3] .cin1_used = "true";
defparam \fault_counter[3] .cin_used = "true";
defparam \fault_counter[3] .lut_mask = "3c3f";
defparam \fault_counter[3] .operation_mode = "arithmetic";
defparam \fault_counter[3] .output_mode = "reg_only";
defparam \fault_counter[3] .register_cascade_mode = "off";
defparam \fault_counter[3] .sum_lutc_input = "cin";
defparam \fault_counter[3] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X3_Y7_N8
maxii_lcell \fault_counter[4] (
// Equation(s):
// fault_counter[4] = DFFEAS(fault_counter[4] $ ((((!(!\fault_counter[0]~23 & \fault_counter[3]~29 ) # (\fault_counter[0]~23 & \fault_counter[3]~29COUT1_73 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[4]~31 = CARRY((fault_counter[4] & ((!\fault_counter[3]~29 ))))
// \fault_counter[4]~31COUT1_74 = CARRY((fault_counter[4] & ((!\fault_counter[3]~29COUT1_73 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[4]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[0]~23 ),
.cin0(\fault_counter[3]~29 ),
.cin1(\fault_counter[3]~29COUT1_73 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[4]),
.cout(),
.cout0(\fault_counter[4]~31 ),
.cout1(\fault_counter[4]~31COUT1_74 ));
// synopsys translate_off
defparam \fault_counter[4] .cin0_used = "true";
defparam \fault_counter[4] .cin1_used = "true";
defparam \fault_counter[4] .cin_used = "true";
defparam \fault_counter[4] .lut_mask = "a50a";
defparam \fault_counter[4] .operation_mode = "arithmetic";
defparam \fault_counter[4] .output_mode = "reg_only";
defparam \fault_counter[4] .register_cascade_mode = "off";
defparam \fault_counter[4] .sum_lutc_input = "cin";
defparam \fault_counter[4] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X3_Y7_N9
maxii_lcell \fault_counter[5] (
// Equation(s):
// fault_counter[5] = DFFEAS((fault_counter[5] $ (((!\fault_counter[0]~23 & \fault_counter[4]~31 ) # (\fault_counter[0]~23 & \fault_counter[4]~31COUT1_74 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[5]~33 = CARRY(((!\fault_counter[4]~31COUT1_74 ) # (!fault_counter[5])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[5]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[0]~23 ),
.cin0(\fault_counter[4]~31 ),
.cin1(\fault_counter[4]~31COUT1_74 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[5]),
.cout(\fault_counter[5]~33 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[5] .cin0_used = "true";
defparam \fault_counter[5] .cin1_used = "true";
defparam \fault_counter[5] .cin_used = "true";
defparam \fault_counter[5] .lut_mask = "3c3f";
defparam \fault_counter[5] .operation_mode = "arithmetic";
defparam \fault_counter[5] .output_mode = "reg_only";
defparam \fault_counter[5] .register_cascade_mode = "off";
defparam \fault_counter[5] .sum_lutc_input = "cin";
defparam \fault_counter[5] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N0
maxii_lcell \fault_counter[6] (
// Equation(s):
// fault_counter[6] = DFFEAS((fault_counter[6] $ ((!\fault_counter[5]~33 ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
// \fault_counter[6]~35 = CARRY(((fault_counter[6] & !\fault_counter[5]~33 )))
// \fault_counter[6]~35COUT1_75 = CARRY(((fault_counter[6] & !\fault_counter[5]~33 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[6]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[5]~33 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[6]),
.cout(),
.cout0(\fault_counter[6]~35 ),
.cout1(\fault_counter[6]~35COUT1_75 ));
// synopsys translate_off
defparam \fault_counter[6] .cin_used = "true";
defparam \fault_counter[6] .lut_mask = "c30c";
defparam \fault_counter[6] .operation_mode = "arithmetic";
defparam \fault_counter[6] .output_mode = "reg_only";
defparam \fault_counter[6] .register_cascade_mode = "off";
defparam \fault_counter[6] .sum_lutc_input = "cin";
defparam \fault_counter[6] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N1
maxii_lcell \fault_counter[7] (
// Equation(s):
// fault_counter[7] = DFFEAS((fault_counter[7] $ (((!\fault_counter[5]~33 & \fault_counter[6]~35 ) # (\fault_counter[5]~33 & \fault_counter[6]~35COUT1_75 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[7]~37 = CARRY(((!\fault_counter[6]~35 ) # (!fault_counter[7])))
// \fault_counter[7]~37COUT1_76 = CARRY(((!\fault_counter[6]~35COUT1_75 ) # (!fault_counter[7])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[7]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[5]~33 ),
.cin0(\fault_counter[6]~35 ),
.cin1(\fault_counter[6]~35COUT1_75 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[7]),
.cout(),
.cout0(\fault_counter[7]~37 ),
.cout1(\fault_counter[7]~37COUT1_76 ));
// synopsys translate_off
defparam \fault_counter[7] .cin0_used = "true";
defparam \fault_counter[7] .cin1_used = "true";
defparam \fault_counter[7] .cin_used = "true";
defparam \fault_counter[7] .lut_mask = "3c3f";
defparam \fault_counter[7] .operation_mode = "arithmetic";
defparam \fault_counter[7] .output_mode = "reg_only";
defparam \fault_counter[7] .register_cascade_mode = "off";
defparam \fault_counter[7] .sum_lutc_input = "cin";
defparam \fault_counter[7] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N2
maxii_lcell \fault_counter[8] (
// Equation(s):
// fault_counter[8] = DFFEAS((fault_counter[8] $ ((!(!\fault_counter[5]~33 & \fault_counter[7]~37 ) # (\fault_counter[5]~33 & \fault_counter[7]~37COUT1_76 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[8]~21 = CARRY(((fault_counter[8] & !\fault_counter[7]~37 )))
// \fault_counter[8]~21COUT1_77 = CARRY(((fault_counter[8] & !\fault_counter[7]~37COUT1_76 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[8]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[5]~33 ),
.cin0(\fault_counter[7]~37 ),
.cin1(\fault_counter[7]~37COUT1_76 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[8]),
.cout(),
.cout0(\fault_counter[8]~21 ),
.cout1(\fault_counter[8]~21COUT1_77 ));
// synopsys translate_off
defparam \fault_counter[8] .cin0_used = "true";
defparam \fault_counter[8] .cin1_used = "true";
defparam \fault_counter[8] .cin_used = "true";
defparam \fault_counter[8] .lut_mask = "c30c";
defparam \fault_counter[8] .operation_mode = "arithmetic";
defparam \fault_counter[8] .output_mode = "reg_only";
defparam \fault_counter[8] .register_cascade_mode = "off";
defparam \fault_counter[8] .sum_lutc_input = "cin";
defparam \fault_counter[8] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N3
maxii_lcell \fault_counter[9] (
// Equation(s):
// fault_counter[9] = DFFEAS(fault_counter[9] $ (((((!\fault_counter[5]~33 & \fault_counter[8]~21 ) # (\fault_counter[5]~33 & \fault_counter[8]~21COUT1_77 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[9]~19 = CARRY(((!\fault_counter[8]~21 )) # (!fault_counter[9]))
// \fault_counter[9]~19COUT1_78 = CARRY(((!\fault_counter[8]~21COUT1_77 )) # (!fault_counter[9]))
.clk(\sys_clk~combout ),
.dataa(fault_counter[9]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[5]~33 ),
.cin0(\fault_counter[8]~21 ),
.cin1(\fault_counter[8]~21COUT1_77 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[9]),
.cout(),
.cout0(\fault_counter[9]~19 ),
.cout1(\fault_counter[9]~19COUT1_78 ));
// synopsys translate_off
defparam \fault_counter[9] .cin0_used = "true";
defparam \fault_counter[9] .cin1_used = "true";
defparam \fault_counter[9] .cin_used = "true";
defparam \fault_counter[9] .lut_mask = "5a5f";
defparam \fault_counter[9] .operation_mode = "arithmetic";
defparam \fault_counter[9] .output_mode = "reg_only";
defparam \fault_counter[9] .register_cascade_mode = "off";
defparam \fault_counter[9] .sum_lutc_input = "cin";
defparam \fault_counter[9] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N4
maxii_lcell \fault_counter[10] (
// Equation(s):
// fault_counter[10] = DFFEAS(fault_counter[10] $ ((((!(!\fault_counter[5]~33 & \fault_counter[9]~19 ) # (\fault_counter[5]~33 & \fault_counter[9]~19COUT1_78 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[10]~41 = CARRY((fault_counter[10] & ((!\fault_counter[9]~19COUT1_78 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[10]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[5]~33 ),
.cin0(\fault_counter[9]~19 ),
.cin1(\fault_counter[9]~19COUT1_78 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[10]),
.cout(\fault_counter[10]~41 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[10] .cin0_used = "true";
defparam \fault_counter[10] .cin1_used = "true";
defparam \fault_counter[10] .cin_used = "true";
defparam \fault_counter[10] .lut_mask = "a50a";
defparam \fault_counter[10] .operation_mode = "arithmetic";
defparam \fault_counter[10] .output_mode = "reg_only";
defparam \fault_counter[10] .register_cascade_mode = "off";
defparam \fault_counter[10] .sum_lutc_input = "cin";
defparam \fault_counter[10] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N5
maxii_lcell \fault_counter[11] (
// Equation(s):
// fault_counter[11] = DFFEAS(fault_counter[11] $ ((((\fault_counter[10]~41 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
// \fault_counter[11]~39 = CARRY(((!\fault_counter[10]~41 )) # (!fault_counter[11]))
// \fault_counter[11]~39COUT1_79 = CARRY(((!\fault_counter[10]~41 )) # (!fault_counter[11]))
.clk(\sys_clk~combout ),
.dataa(fault_counter[11]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[10]~41 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[11]),
.cout(),
.cout0(\fault_counter[11]~39 ),
.cout1(\fault_counter[11]~39COUT1_79 ));
// synopsys translate_off
defparam \fault_counter[11] .cin_used = "true";
defparam \fault_counter[11] .lut_mask = "5a5f";
defparam \fault_counter[11] .operation_mode = "arithmetic";
defparam \fault_counter[11] .output_mode = "reg_only";
defparam \fault_counter[11] .register_cascade_mode = "off";
defparam \fault_counter[11] .sum_lutc_input = "cin";
defparam \fault_counter[11] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N6
maxii_lcell \fault_counter[12] (
// Equation(s):
// fault_counter[12] = DFFEAS(fault_counter[12] $ ((((!(!\fault_counter[10]~41 & \fault_counter[11]~39 ) # (\fault_counter[10]~41 & \fault_counter[11]~39COUT1_79 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , ,
// , \Equal0~1 , )
// \fault_counter[12]~13 = CARRY((fault_counter[12] & ((!\fault_counter[11]~39 ))))
// \fault_counter[12]~13COUT1_80 = CARRY((fault_counter[12] & ((!\fault_counter[11]~39COUT1_79 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[12]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[10]~41 ),
.cin0(\fault_counter[11]~39 ),
.cin1(\fault_counter[11]~39COUT1_79 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[12]),
.cout(),
.cout0(\fault_counter[12]~13 ),
.cout1(\fault_counter[12]~13COUT1_80 ));
// synopsys translate_off
defparam \fault_counter[12] .cin0_used = "true";
defparam \fault_counter[12] .cin1_used = "true";
defparam \fault_counter[12] .cin_used = "true";
defparam \fault_counter[12] .lut_mask = "a50a";
defparam \fault_counter[12] .operation_mode = "arithmetic";
defparam \fault_counter[12] .output_mode = "reg_only";
defparam \fault_counter[12] .register_cascade_mode = "off";
defparam \fault_counter[12] .sum_lutc_input = "cin";
defparam \fault_counter[12] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N7
maxii_lcell \fault_counter[13] (
// Equation(s):
// fault_counter[13] = DFFEAS((fault_counter[13] $ (((!\fault_counter[10]~41 & \fault_counter[12]~13 ) # (\fault_counter[10]~41 & \fault_counter[12]~13COUT1_80 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[13]~11 = CARRY(((!\fault_counter[12]~13 ) # (!fault_counter[13])))
// \fault_counter[13]~11COUT1_81 = CARRY(((!\fault_counter[12]~13COUT1_80 ) # (!fault_counter[13])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[13]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[10]~41 ),
.cin0(\fault_counter[12]~13 ),
.cin1(\fault_counter[12]~13COUT1_80 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[13]),
.cout(),
.cout0(\fault_counter[13]~11 ),
.cout1(\fault_counter[13]~11COUT1_81 ));
// synopsys translate_off
defparam \fault_counter[13] .cin0_used = "true";
defparam \fault_counter[13] .cin1_used = "true";
defparam \fault_counter[13] .cin_used = "true";
defparam \fault_counter[13] .lut_mask = "3c3f";
defparam \fault_counter[13] .operation_mode = "arithmetic";
defparam \fault_counter[13] .output_mode = "reg_only";
defparam \fault_counter[13] .register_cascade_mode = "off";
defparam \fault_counter[13] .sum_lutc_input = "cin";
defparam \fault_counter[13] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N8
maxii_lcell \fault_counter[14] (
// Equation(s):
// fault_counter[14] = DFFEAS(fault_counter[14] $ ((((!(!\fault_counter[10]~41 & \fault_counter[13]~11 ) # (\fault_counter[10]~41 & \fault_counter[13]~11COUT1_81 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , ,
// , \Equal0~1 , )
// \fault_counter[14]~15 = CARRY((fault_counter[14] & ((!\fault_counter[13]~11 ))))
// \fault_counter[14]~15COUT1_82 = CARRY((fault_counter[14] & ((!\fault_counter[13]~11COUT1_81 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[14]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[10]~41 ),
.cin0(\fault_counter[13]~11 ),
.cin1(\fault_counter[13]~11COUT1_81 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[14]),
.cout(),
.cout0(\fault_counter[14]~15 ),
.cout1(\fault_counter[14]~15COUT1_82 ));
// synopsys translate_off
defparam \fault_counter[14] .cin0_used = "true";
defparam \fault_counter[14] .cin1_used = "true";
defparam \fault_counter[14] .cin_used = "true";
defparam \fault_counter[14] .lut_mask = "a50a";
defparam \fault_counter[14] .operation_mode = "arithmetic";
defparam \fault_counter[14] .output_mode = "reg_only";
defparam \fault_counter[14] .register_cascade_mode = "off";
defparam \fault_counter[14] .sum_lutc_input = "cin";
defparam \fault_counter[14] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X4_Y7_N9
maxii_lcell \fault_counter[15] (
// Equation(s):
// fault_counter[15] = DFFEAS((fault_counter[15] $ (((!\fault_counter[10]~41 & \fault_counter[14]~15 ) # (\fault_counter[10]~41 & \fault_counter[14]~15COUT1_82 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[15]~17 = CARRY(((!\fault_counter[14]~15COUT1_82 ) # (!fault_counter[15])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[15]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[10]~41 ),
.cin0(\fault_counter[14]~15 ),
.cin1(\fault_counter[14]~15COUT1_82 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[15]),
.cout(\fault_counter[15]~17 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[15] .cin0_used = "true";
defparam \fault_counter[15] .cin1_used = "true";
defparam \fault_counter[15] .cin_used = "true";
defparam \fault_counter[15] .lut_mask = "3c3f";
defparam \fault_counter[15] .operation_mode = "arithmetic";
defparam \fault_counter[15] .output_mode = "reg_only";
defparam \fault_counter[15] .register_cascade_mode = "off";
defparam \fault_counter[15] .sum_lutc_input = "cin";
defparam \fault_counter[15] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N0
maxii_lcell \fault_counter[16] (
// Equation(s):
// fault_counter[16] = DFFEAS((fault_counter[16] $ ((!\fault_counter[15]~17 ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
// \fault_counter[16]~9 = CARRY(((fault_counter[16] & !\fault_counter[15]~17 )))
// \fault_counter[16]~9COUT1_83 = CARRY(((fault_counter[16] & !\fault_counter[15]~17 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[16]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[15]~17 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[16]),
.cout(),
.cout0(\fault_counter[16]~9 ),
.cout1(\fault_counter[16]~9COUT1_83 ));
// synopsys translate_off
defparam \fault_counter[16] .cin_used = "true";
defparam \fault_counter[16] .lut_mask = "c30c";
defparam \fault_counter[16] .operation_mode = "arithmetic";
defparam \fault_counter[16] .output_mode = "reg_only";
defparam \fault_counter[16] .register_cascade_mode = "off";
defparam \fault_counter[16] .sum_lutc_input = "cin";
defparam \fault_counter[16] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N1
maxii_lcell \fault_counter[17] (
// Equation(s):
// fault_counter[17] = DFFEAS((fault_counter[17] $ (((!\fault_counter[15]~17 & \fault_counter[16]~9 ) # (\fault_counter[15]~17 & \fault_counter[16]~9COUT1_83 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[17]~43 = CARRY(((!\fault_counter[16]~9 ) # (!fault_counter[17])))
// \fault_counter[17]~43COUT1_84 = CARRY(((!\fault_counter[16]~9COUT1_83 ) # (!fault_counter[17])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[17]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[15]~17 ),
.cin0(\fault_counter[16]~9 ),
.cin1(\fault_counter[16]~9COUT1_83 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[17]),
.cout(),
.cout0(\fault_counter[17]~43 ),
.cout1(\fault_counter[17]~43COUT1_84 ));
// synopsys translate_off
defparam \fault_counter[17] .cin0_used = "true";
defparam \fault_counter[17] .cin1_used = "true";
defparam \fault_counter[17] .cin_used = "true";
defparam \fault_counter[17] .lut_mask = "3c3f";
defparam \fault_counter[17] .operation_mode = "arithmetic";
defparam \fault_counter[17] .output_mode = "reg_only";
defparam \fault_counter[17] .register_cascade_mode = "off";
defparam \fault_counter[17] .sum_lutc_input = "cin";
defparam \fault_counter[17] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N2
maxii_lcell \fault_counter[18] (
// Equation(s):
// fault_counter[18] = DFFEAS((fault_counter[18] $ ((!(!\fault_counter[15]~17 & \fault_counter[17]~43 ) # (\fault_counter[15]~17 & \fault_counter[17]~43COUT1_84 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[18]~45 = CARRY(((fault_counter[18] & !\fault_counter[17]~43 )))
// \fault_counter[18]~45COUT1_85 = CARRY(((fault_counter[18] & !\fault_counter[17]~43COUT1_84 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[18]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[15]~17 ),
.cin0(\fault_counter[17]~43 ),
.cin1(\fault_counter[17]~43COUT1_84 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[18]),
.cout(),
.cout0(\fault_counter[18]~45 ),
.cout1(\fault_counter[18]~45COUT1_85 ));
// synopsys translate_off
defparam \fault_counter[18] .cin0_used = "true";
defparam \fault_counter[18] .cin1_used = "true";
defparam \fault_counter[18] .cin_used = "true";
defparam \fault_counter[18] .lut_mask = "c30c";
defparam \fault_counter[18] .operation_mode = "arithmetic";
defparam \fault_counter[18] .output_mode = "reg_only";
defparam \fault_counter[18] .register_cascade_mode = "off";
defparam \fault_counter[18] .sum_lutc_input = "cin";
defparam \fault_counter[18] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N3
maxii_lcell \fault_counter[19] (
// Equation(s):
// fault_counter[19] = DFFEAS(fault_counter[19] $ (((((!\fault_counter[15]~17 & \fault_counter[18]~45 ) # (\fault_counter[15]~17 & \fault_counter[18]~45COUT1_85 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , ,
// , \Equal0~1 , )
// \fault_counter[19]~47 = CARRY(((!\fault_counter[18]~45 )) # (!fault_counter[19]))
// \fault_counter[19]~47COUT1_86 = CARRY(((!\fault_counter[18]~45COUT1_85 )) # (!fault_counter[19]))
.clk(\sys_clk~combout ),
.dataa(fault_counter[19]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[15]~17 ),
.cin0(\fault_counter[18]~45 ),
.cin1(\fault_counter[18]~45COUT1_85 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[19]),
.cout(),
.cout0(\fault_counter[19]~47 ),
.cout1(\fault_counter[19]~47COUT1_86 ));
// synopsys translate_off
defparam \fault_counter[19] .cin0_used = "true";
defparam \fault_counter[19] .cin1_used = "true";
defparam \fault_counter[19] .cin_used = "true";
defparam \fault_counter[19] .lut_mask = "5a5f";
defparam \fault_counter[19] .operation_mode = "arithmetic";
defparam \fault_counter[19] .output_mode = "reg_only";
defparam \fault_counter[19] .register_cascade_mode = "off";
defparam \fault_counter[19] .sum_lutc_input = "cin";
defparam \fault_counter[19] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N4
maxii_lcell \fault_counter[20] (
// Equation(s):
// fault_counter[20] = DFFEAS(fault_counter[20] $ ((((!(!\fault_counter[15]~17 & \fault_counter[19]~47 ) # (\fault_counter[15]~17 & \fault_counter[19]~47COUT1_86 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , ,
// , \Equal0~1 , )
// \fault_counter[20]~5 = CARRY((fault_counter[20] & ((!\fault_counter[19]~47COUT1_86 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[20]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[15]~17 ),
.cin0(\fault_counter[19]~47 ),
.cin1(\fault_counter[19]~47COUT1_86 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[20]),
.cout(\fault_counter[20]~5 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[20] .cin0_used = "true";
defparam \fault_counter[20] .cin1_used = "true";
defparam \fault_counter[20] .cin_used = "true";
defparam \fault_counter[20] .lut_mask = "a50a";
defparam \fault_counter[20] .operation_mode = "arithmetic";
defparam \fault_counter[20] .output_mode = "reg_only";
defparam \fault_counter[20] .register_cascade_mode = "off";
defparam \fault_counter[20] .sum_lutc_input = "cin";
defparam \fault_counter[20] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N5
maxii_lcell \fault_counter[21] (
// Equation(s):
// fault_counter[21] = DFFEAS(fault_counter[21] $ ((((\fault_counter[20]~5 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
// \fault_counter[21]~7 = CARRY(((!\fault_counter[20]~5 )) # (!fault_counter[21]))
// \fault_counter[21]~7COUT1_87 = CARRY(((!\fault_counter[20]~5 )) # (!fault_counter[21]))
.clk(\sys_clk~combout ),
.dataa(fault_counter[21]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[20]~5 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[21]),
.cout(),
.cout0(\fault_counter[21]~7 ),
.cout1(\fault_counter[21]~7COUT1_87 ));
// synopsys translate_off
defparam \fault_counter[21] .cin_used = "true";
defparam \fault_counter[21] .lut_mask = "5a5f";
defparam \fault_counter[21] .operation_mode = "arithmetic";
defparam \fault_counter[21] .output_mode = "reg_only";
defparam \fault_counter[21] .register_cascade_mode = "off";
defparam \fault_counter[21] .sum_lutc_input = "cin";
defparam \fault_counter[21] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N6
maxii_lcell \fault_counter[22] (
// Equation(s):
// fault_counter[22] = DFFEAS(fault_counter[22] $ ((((!(!\fault_counter[20]~5 & \fault_counter[21]~7 ) # (\fault_counter[20]~5 & \fault_counter[21]~7COUT1_87 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[22]~49 = CARRY((fault_counter[22] & ((!\fault_counter[21]~7 ))))
// \fault_counter[22]~49COUT1_88 = CARRY((fault_counter[22] & ((!\fault_counter[21]~7COUT1_87 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[22]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[20]~5 ),
.cin0(\fault_counter[21]~7 ),
.cin1(\fault_counter[21]~7COUT1_87 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[22]),
.cout(),
.cout0(\fault_counter[22]~49 ),
.cout1(\fault_counter[22]~49COUT1_88 ));
// synopsys translate_off
defparam \fault_counter[22] .cin0_used = "true";
defparam \fault_counter[22] .cin1_used = "true";
defparam \fault_counter[22] .cin_used = "true";
defparam \fault_counter[22] .lut_mask = "a50a";
defparam \fault_counter[22] .operation_mode = "arithmetic";
defparam \fault_counter[22] .output_mode = "reg_only";
defparam \fault_counter[22] .register_cascade_mode = "off";
defparam \fault_counter[22] .sum_lutc_input = "cin";
defparam \fault_counter[22] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N7
maxii_lcell \fault_counter[23] (
// Equation(s):
// fault_counter[23] = DFFEAS((fault_counter[23] $ (((!\fault_counter[20]~5 & \fault_counter[22]~49 ) # (\fault_counter[20]~5 & \fault_counter[22]~49COUT1_88 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[23]~51 = CARRY(((!\fault_counter[22]~49 ) # (!fault_counter[23])))
// \fault_counter[23]~51COUT1_89 = CARRY(((!\fault_counter[22]~49COUT1_88 ) # (!fault_counter[23])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[23]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[20]~5 ),
.cin0(\fault_counter[22]~49 ),
.cin1(\fault_counter[22]~49COUT1_88 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[23]),
.cout(),
.cout0(\fault_counter[23]~51 ),
.cout1(\fault_counter[23]~51COUT1_89 ));
// synopsys translate_off
defparam \fault_counter[23] .cin0_used = "true";
defparam \fault_counter[23] .cin1_used = "true";
defparam \fault_counter[23] .cin_used = "true";
defparam \fault_counter[23] .lut_mask = "3c3f";
defparam \fault_counter[23] .operation_mode = "arithmetic";
defparam \fault_counter[23] .output_mode = "reg_only";
defparam \fault_counter[23] .register_cascade_mode = "off";
defparam \fault_counter[23] .sum_lutc_input = "cin";
defparam \fault_counter[23] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N8
maxii_lcell \fault_counter[24] (
// Equation(s):
// fault_counter[24] = DFFEAS(fault_counter[24] $ ((((!(!\fault_counter[20]~5 & \fault_counter[23]~51 ) # (\fault_counter[20]~5 & \fault_counter[23]~51COUT1_89 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[24]~3 = CARRY((fault_counter[24] & ((!\fault_counter[23]~51 ))))
// \fault_counter[24]~3COUT1_90 = CARRY((fault_counter[24] & ((!\fault_counter[23]~51COUT1_89 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[24]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[20]~5 ),
.cin0(\fault_counter[23]~51 ),
.cin1(\fault_counter[23]~51COUT1_89 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[24]),
.cout(),
.cout0(\fault_counter[24]~3 ),
.cout1(\fault_counter[24]~3COUT1_90 ));
// synopsys translate_off
defparam \fault_counter[24] .cin0_used = "true";
defparam \fault_counter[24] .cin1_used = "true";
defparam \fault_counter[24] .cin_used = "true";
defparam \fault_counter[24] .lut_mask = "a50a";
defparam \fault_counter[24] .operation_mode = "arithmetic";
defparam \fault_counter[24] .output_mode = "reg_only";
defparam \fault_counter[24] .register_cascade_mode = "off";
defparam \fault_counter[24] .sum_lutc_input = "cin";
defparam \fault_counter[24] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y7_N9
maxii_lcell \fault_counter[25] (
// Equation(s):
// fault_counter[25] = DFFEAS((fault_counter[25] $ (((!\fault_counter[20]~5 & \fault_counter[24]~3 ) # (\fault_counter[20]~5 & \fault_counter[24]~3COUT1_90 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[25]~53 = CARRY(((!\fault_counter[24]~3COUT1_90 ) # (!fault_counter[25])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[25]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[20]~5 ),
.cin0(\fault_counter[24]~3 ),
.cin1(\fault_counter[24]~3COUT1_90 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[25]),
.cout(\fault_counter[25]~53 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[25] .cin0_used = "true";
defparam \fault_counter[25] .cin1_used = "true";
defparam \fault_counter[25] .cin_used = "true";
defparam \fault_counter[25] .lut_mask = "3c3f";
defparam \fault_counter[25] .operation_mode = "arithmetic";
defparam \fault_counter[25] .output_mode = "reg_only";
defparam \fault_counter[25] .register_cascade_mode = "off";
defparam \fault_counter[25] .sum_lutc_input = "cin";
defparam \fault_counter[25] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y7_N0
maxii_lcell \fault_counter[26] (
// Equation(s):
// fault_counter[26] = DFFEAS((fault_counter[26] $ ((!\fault_counter[25]~53 ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
// \fault_counter[26]~55 = CARRY(((fault_counter[26] & !\fault_counter[25]~53 )))
// \fault_counter[26]~55COUT1_91 = CARRY(((fault_counter[26] & !\fault_counter[25]~53 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[26]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[25]~53 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[26]),
.cout(),
.cout0(\fault_counter[26]~55 ),
.cout1(\fault_counter[26]~55COUT1_91 ));
// synopsys translate_off
defparam \fault_counter[26] .cin_used = "true";
defparam \fault_counter[26] .lut_mask = "c30c";
defparam \fault_counter[26] .operation_mode = "arithmetic";
defparam \fault_counter[26] .output_mode = "reg_only";
defparam \fault_counter[26] .register_cascade_mode = "off";
defparam \fault_counter[26] .sum_lutc_input = "cin";
defparam \fault_counter[26] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y7_N1
maxii_lcell \fault_counter[27] (
// Equation(s):
// fault_counter[27] = DFFEAS((fault_counter[27] $ (((!\fault_counter[25]~53 & \fault_counter[26]~55 ) # (\fault_counter[25]~53 & \fault_counter[26]~55COUT1_91 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[27]~57 = CARRY(((!\fault_counter[26]~55 ) # (!fault_counter[27])))
// \fault_counter[27]~57COUT1_92 = CARRY(((!\fault_counter[26]~55COUT1_91 ) # (!fault_counter[27])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[27]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[25]~53 ),
.cin0(\fault_counter[26]~55 ),
.cin1(\fault_counter[26]~55COUT1_91 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[27]),
.cout(),
.cout0(\fault_counter[27]~57 ),
.cout1(\fault_counter[27]~57COUT1_92 ));
// synopsys translate_off
defparam \fault_counter[27] .cin0_used = "true";
defparam \fault_counter[27] .cin1_used = "true";
defparam \fault_counter[27] .cin_used = "true";
defparam \fault_counter[27] .lut_mask = "3c3f";
defparam \fault_counter[27] .operation_mode = "arithmetic";
defparam \fault_counter[27] .output_mode = "reg_only";
defparam \fault_counter[27] .register_cascade_mode = "off";
defparam \fault_counter[27] .sum_lutc_input = "cin";
defparam \fault_counter[27] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y7_N2
maxii_lcell \fault_counter[28] (
// Equation(s):
// fault_counter[28] = DFFEAS((fault_counter[28] $ ((!(!\fault_counter[25]~53 & \fault_counter[27]~57 ) # (\fault_counter[25]~53 & \fault_counter[27]~57COUT1_92 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , ,
// \Equal0~1 , )
// \fault_counter[28]~59 = CARRY(((fault_counter[28] & !\fault_counter[27]~57 )))
// \fault_counter[28]~59COUT1_93 = CARRY(((fault_counter[28] & !\fault_counter[27]~57COUT1_92 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(fault_counter[28]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[25]~53 ),
.cin0(\fault_counter[27]~57 ),
.cin1(\fault_counter[27]~57COUT1_92 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[28]),
.cout(),
.cout0(\fault_counter[28]~59 ),
.cout1(\fault_counter[28]~59COUT1_93 ));
// synopsys translate_off
defparam \fault_counter[28] .cin0_used = "true";
defparam \fault_counter[28] .cin1_used = "true";
defparam \fault_counter[28] .cin_used = "true";
defparam \fault_counter[28] .lut_mask = "c30c";
defparam \fault_counter[28] .operation_mode = "arithmetic";
defparam \fault_counter[28] .output_mode = "reg_only";
defparam \fault_counter[28] .register_cascade_mode = "off";
defparam \fault_counter[28] .sum_lutc_input = "cin";
defparam \fault_counter[28] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y7_N3
maxii_lcell \fault_counter[29] (
// Equation(s):
// fault_counter[29] = DFFEAS(fault_counter[29] $ (((((!\fault_counter[25]~53 & \fault_counter[28]~59 ) # (\fault_counter[25]~53 & \fault_counter[28]~59COUT1_93 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , ,
// , \Equal0~1 , )
// \fault_counter[29]~62 = CARRY(((!\fault_counter[28]~59 )) # (!fault_counter[29]))
// \fault_counter[29]~62COUT1_94 = CARRY(((!\fault_counter[28]~59COUT1_93 )) # (!fault_counter[29]))
.clk(\sys_clk~combout ),
.dataa(fault_counter[29]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[25]~53 ),
.cin0(\fault_counter[28]~59 ),
.cin1(\fault_counter[28]~59COUT1_93 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[29]),
.cout(),
.cout0(\fault_counter[29]~62 ),
.cout1(\fault_counter[29]~62COUT1_94 ));
// synopsys translate_off
defparam \fault_counter[29] .cin0_used = "true";
defparam \fault_counter[29] .cin1_used = "true";
defparam \fault_counter[29] .cin_used = "true";
defparam \fault_counter[29] .lut_mask = "5a5f";
defparam \fault_counter[29] .operation_mode = "arithmetic";
defparam \fault_counter[29] .output_mode = "reg_only";
defparam \fault_counter[29] .register_cascade_mode = "off";
defparam \fault_counter[29] .sum_lutc_input = "cin";
defparam \fault_counter[29] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y7_N4
maxii_lcell \fault_counter[30] (
// Equation(s):
// fault_counter[30] = DFFEAS(fault_counter[30] $ ((((!(!\fault_counter[25]~53 & \fault_counter[29]~62 ) # (\fault_counter[25]~53 & \fault_counter[29]~62COUT1_94 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , ,
// , \Equal0~1 , )
// \fault_counter[30]~64 = CARRY((fault_counter[30] & ((!\fault_counter[29]~62COUT1_94 ))))
.clk(\sys_clk~combout ),
.dataa(fault_counter[30]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[25]~53 ),
.cin0(\fault_counter[29]~62 ),
.cin1(\fault_counter[29]~62COUT1_94 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[30]),
.cout(\fault_counter[30]~64 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[30] .cin0_used = "true";
defparam \fault_counter[30] .cin1_used = "true";
defparam \fault_counter[30] .cin_used = "true";
defparam \fault_counter[30] .lut_mask = "a50a";
defparam \fault_counter[30] .operation_mode = "arithmetic";
defparam \fault_counter[30] .output_mode = "reg_only";
defparam \fault_counter[30] .register_cascade_mode = "off";
defparam \fault_counter[30] .sum_lutc_input = "cin";
defparam \fault_counter[30] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y7_N5
maxii_lcell \fault_counter[31] (
// Equation(s):
// fault_counter[31] = DFFEAS(fault_counter[31] $ ((((\fault_counter[30]~64 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \fault_counter[26]~69_combout , , , \Equal0~1 , )
.clk(\sys_clk~combout ),
.dataa(fault_counter[31]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\Equal0~1 ),
.sload(gnd),
.ena(\fault_counter[26]~69_combout ),
.cin(\fault_counter[30]~64 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(fault_counter[31]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[31] .cin_used = "true";
defparam \fault_counter[31] .lut_mask = "5a5a";
defparam \fault_counter[31] .operation_mode = "normal";
defparam \fault_counter[31] .output_mode = "reg_only";
defparam \fault_counter[31] .register_cascade_mode = "off";
defparam \fault_counter[31] .sum_lutc_input = "cin";
defparam \fault_counter[31] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y7_N8
maxii_lcell \fault_counter[26]~60 (
// Equation(s):
// \fault_counter[26]~60_combout = (!fault_counter[25] & (!fault_counter[28] & (!fault_counter[26] & !fault_counter[27])))
.clk(gnd),
.dataa(fault_counter[25]),
.datab(fault_counter[28]),
.datac(fault_counter[26]),
.datad(fault_counter[27]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_counter[26]~60_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[26]~60 .lut_mask = "0001";
defparam \fault_counter[26]~60 .operation_mode = "normal";
defparam \fault_counter[26]~60 .output_mode = "comb_only";
defparam \fault_counter[26]~60 .register_cascade_mode = "off";
defparam \fault_counter[26]~60 .sum_lutc_input = "datac";
defparam \fault_counter[26]~60 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y7_N9
maxii_lcell \fault_counter[26]~67 (
// Equation(s):
// \fault_counter[26]~67_combout = (!fault_counter[29] & (!fault_counter[30] & (!fault_counter[31] & \fault_counter[26]~60_combout )))
.clk(gnd),
.dataa(fault_counter[29]),
.datab(fault_counter[30]),
.datac(fault_counter[31]),
.datad(\fault_counter[26]~60_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_counter[26]~67_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[26]~67 .lut_mask = "0100";
defparam \fault_counter[26]~67 .operation_mode = "normal";
defparam \fault_counter[26]~67 .output_mode = "comb_only";
defparam \fault_counter[26]~67 .register_cascade_mode = "off";
defparam \fault_counter[26]~67 .sum_lutc_input = "datac";
defparam \fault_counter[26]~67 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N2
maxii_lcell \fault_flag~7 (
// Equation(s):
// \fault_flag~7_combout = ((!fault_counter[17] & (!fault_counter[18] & !fault_counter[19])))
.clk(gnd),
.dataa(vcc),
.datab(fault_counter[17]),
.datac(fault_counter[18]),
.datad(fault_counter[19]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~7_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~7 .lut_mask = "0003";
defparam \fault_flag~7 .operation_mode = "normal";
defparam \fault_flag~7 .output_mode = "comb_only";
defparam \fault_flag~7 .register_cascade_mode = "off";
defparam \fault_flag~7 .sum_lutc_input = "datac";
defparam \fault_flag~7 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N3
maxii_lcell \LessThan2~8 (
// Equation(s):
// \LessThan2~8_combout = ((fault_counter[21] & ((fault_counter[16]) # (!\fault_flag~7_combout ))))
.clk(gnd),
.dataa(vcc),
.datab(fault_counter[21]),
.datac(fault_counter[16]),
.datad(\fault_flag~7_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~8_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~8 .lut_mask = "c0cc";
defparam \LessThan2~8 .operation_mode = "normal";
defparam \LessThan2~8 .output_mode = "comb_only";
defparam \LessThan2~8 .register_cascade_mode = "off";
defparam \LessThan2~8 .sum_lutc_input = "datac";
defparam \LessThan2~8 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N0
maxii_lcell \LessThan2~9 (
// Equation(s):
// \LessThan2~9_combout = (!fault_counter[23] & (!fault_counter[22] & ((!\LessThan2~8_combout ) # (!fault_counter[20]))))
.clk(gnd),
.dataa(fault_counter[20]),
.datab(fault_counter[23]),
.datac(fault_counter[22]),
.datad(\LessThan2~8_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~9_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~9 .lut_mask = "0103";
defparam \LessThan2~9 .operation_mode = "normal";
defparam \LessThan2~9 .output_mode = "comb_only";
defparam \LessThan2~9 .register_cascade_mode = "off";
defparam \LessThan2~9 .sum_lutc_input = "datac";
defparam \LessThan2~9 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X1_Y7_N5
maxii_lcell \LessThan2~6 (
// Equation(s):
// \LessThan2~6_combout = (!fault_counter[12] & (((!fault_counter[9] & !fault_counter[8])) # (!fault_counter[10])))
.clk(gnd),
.dataa(fault_counter[10]),
.datab(fault_counter[12]),
.datac(fault_counter[9]),
.datad(fault_counter[8]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~6_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~6 .lut_mask = "1113";
defparam \LessThan2~6 .operation_mode = "normal";
defparam \LessThan2~6 .output_mode = "comb_only";
defparam \LessThan2~6 .register_cascade_mode = "off";
defparam \LessThan2~6 .sum_lutc_input = "datac";
defparam \LessThan2~6 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y7_N2
maxii_lcell \LessThan2~2 (
// Equation(s):
// \LessThan2~2_combout = (((!fault_counter[11] & !fault_counter[12])) # (!fault_counter[13]))
.clk(gnd),
.dataa(vcc),
.datab(fault_counter[11]),
.datac(fault_counter[12]),
.datad(fault_counter[13]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~2_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~2 .lut_mask = "03ff";
defparam \LessThan2~2 .operation_mode = "normal";
defparam \LessThan2~2 .output_mode = "comb_only";
defparam \LessThan2~2 .register_cascade_mode = "off";
defparam \LessThan2~2 .sum_lutc_input = "datac";
defparam \LessThan2~2 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N4
maxii_lcell \LessThan2~4 (
// Equation(s):
// \LessThan2~4_combout = (!fault_counter[3] & (!fault_counter[5] & (!fault_counter[2] & !fault_counter[4])))
.clk(gnd),
.dataa(fault_counter[3]),
.datab(fault_counter[5]),
.datac(fault_counter[2]),
.datad(fault_counter[4]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~4_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~4 .lut_mask = "0001";
defparam \LessThan2~4 .operation_mode = "normal";
defparam \LessThan2~4 .output_mode = "comb_only";
defparam \LessThan2~4 .register_cascade_mode = "off";
defparam \LessThan2~4 .sum_lutc_input = "datac";
defparam \LessThan2~4 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y7_N1
maxii_lcell \LessThan2~3 (
// Equation(s):
// \LessThan2~3_combout = (!fault_counter[1] & (!fault_counter[0] & (!fault_counter[12] & !fault_counter[9])))
.clk(gnd),
.dataa(fault_counter[1]),
.datab(fault_counter[0]),
.datac(fault_counter[12]),
.datad(fault_counter[9]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~3_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~3 .lut_mask = "0001";
defparam \LessThan2~3 .operation_mode = "normal";
defparam \LessThan2~3 .output_mode = "comb_only";
defparam \LessThan2~3 .register_cascade_mode = "off";
defparam \LessThan2~3 .sum_lutc_input = "datac";
defparam \LessThan2~3 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N6
maxii_lcell \LessThan2~5 (
// Equation(s):
// \LessThan2~5_combout = (!fault_counter[6] & (!fault_counter[7] & (\LessThan2~4_combout & \LessThan2~3_combout )))
.clk(gnd),
.dataa(fault_counter[6]),
.datab(fault_counter[7]),
.datac(\LessThan2~4_combout ),
.datad(\LessThan2~3_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~5_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~5 .lut_mask = "1000";
defparam \LessThan2~5 .operation_mode = "normal";
defparam \LessThan2~5 .output_mode = "comb_only";
defparam \LessThan2~5 .register_cascade_mode = "off";
defparam \LessThan2~5 .sum_lutc_input = "datac";
defparam \LessThan2~5 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y7_N3
maxii_lcell \LessThan2~0 (
// Equation(s):
// \LessThan2~0_combout = (((!fault_counter[15] & !fault_counter[14])))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(fault_counter[15]),
.datad(fault_counter[14]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~0_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~0 .lut_mask = "000f";
defparam \LessThan2~0 .operation_mode = "normal";
defparam \LessThan2~0 .output_mode = "comb_only";
defparam \LessThan2~0 .register_cascade_mode = "off";
defparam \LessThan2~0 .sum_lutc_input = "datac";
defparam \LessThan2~0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N9
maxii_lcell \LessThan2~1 (
// Equation(s):
// \LessThan2~1_combout = (!fault_counter[22] & (!fault_counter[23] & (\LessThan2~0_combout & \fault_flag~7_combout )))
.clk(gnd),
.dataa(fault_counter[22]),
.datab(fault_counter[23]),
.datac(\LessThan2~0_combout ),
.datad(\fault_flag~7_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~1_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~1 .lut_mask = "1000";
defparam \LessThan2~1 .operation_mode = "normal";
defparam \LessThan2~1 .output_mode = "comb_only";
defparam \LessThan2~1 .register_cascade_mode = "off";
defparam \LessThan2~1 .sum_lutc_input = "datac";
defparam \LessThan2~1 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N7
maxii_lcell \LessThan2~7 (
// Equation(s):
// \LessThan2~7_combout = (\LessThan2~1_combout & ((\LessThan2~6_combout ) # ((\LessThan2~2_combout ) # (\LessThan2~5_combout ))))
.clk(gnd),
.dataa(\LessThan2~6_combout ),
.datab(\LessThan2~2_combout ),
.datac(\LessThan2~5_combout ),
.datad(\LessThan2~1_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\LessThan2~7_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \LessThan2~7 .lut_mask = "fe00";
defparam \LessThan2~7 .operation_mode = "normal";
defparam \LessThan2~7 .output_mode = "comb_only";
defparam \LessThan2~7 .register_cascade_mode = "off";
defparam \LessThan2~7 .sum_lutc_input = "datac";
defparam \LessThan2~7 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N8
maxii_lcell \fault_counter[26]~68 (
// Equation(s):
// \fault_counter[26]~68_combout = (\fault_counter[26]~67_combout & (((\LessThan2~9_combout ) # (\LessThan2~7_combout )) # (!fault_counter[24])))
.clk(gnd),
.dataa(fault_counter[24]),
.datab(\fault_counter[26]~67_combout ),
.datac(\LessThan2~9_combout ),
.datad(\LessThan2~7_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_counter[26]~68_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[26]~68 .lut_mask = "ccc4";
defparam \fault_counter[26]~68 .operation_mode = "normal";
defparam \fault_counter[26]~68 .output_mode = "comb_only";
defparam \fault_counter[26]~68 .register_cascade_mode = "off";
defparam \fault_counter[26]~68 .sum_lutc_input = "datac";
defparam \fault_counter[26]~68 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X2_Y7_N5
maxii_lcell \fault_counter[26]~69 (
// Equation(s):
// \fault_counter[26]~69_combout = (\fault_counter[26]~68_combout ) # ((\Equal0~0 & (cache_line_sclk[0] & \line_sclk~combout )))
.clk(gnd),
.dataa(\Equal0~0 ),
.datab(cache_line_sclk[0]),
.datac(\line_sclk~combout ),
.datad(\fault_counter[26]~68_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_counter[26]~69_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_counter[26]~69 .lut_mask = "ff80";
defparam \fault_counter[26]~69 .operation_mode = "normal";
defparam \fault_counter[26]~69 .output_mode = "comb_only";
defparam \fault_counter[26]~69 .register_cascade_mode = "off";
defparam \fault_counter[26]~69 .sum_lutc_input = "datac";
defparam \fault_counter[26]~69 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N6
maxii_lcell \fault_flag~10 (
// Equation(s):
// \fault_flag~10_combout = ((fault_counter[24] & ((fault_counter[23]) # (fault_counter[22]))))
.clk(gnd),
.dataa(vcc),
.datab(fault_counter[23]),
.datac(fault_counter[22]),
.datad(fault_counter[24]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~10_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~10 .lut_mask = "fc00";
defparam \fault_flag~10 .operation_mode = "normal";
defparam \fault_flag~10 .output_mode = "comb_only";
defparam \fault_flag~10 .register_cascade_mode = "off";
defparam \fault_flag~10 .sum_lutc_input = "datac";
defparam \fault_flag~10 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N7
maxii_lcell \fault_flag~6 (
// Equation(s):
// \fault_flag~6_combout = (fault_counter[13] & (fault_counter[10] & (fault_counter[11] & fault_counter[16])))
.clk(gnd),
.dataa(fault_counter[13]),
.datab(fault_counter[10]),
.datac(fault_counter[11]),
.datad(fault_counter[16]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~6_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~6 .lut_mask = "8000";
defparam \fault_flag~6 .operation_mode = "normal";
defparam \fault_flag~6 .output_mode = "comb_only";
defparam \fault_flag~6 .register_cascade_mode = "off";
defparam \fault_flag~6 .sum_lutc_input = "datac";
defparam \fault_flag~6 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N0
maxii_lcell \fault_flag~2 (
// Equation(s):
// \fault_flag~2_combout = (fault_counter[16] & (((fault_counter[12] & fault_counter[13])) # (!\LessThan2~0_combout )))
.clk(gnd),
.dataa(\LessThan2~0_combout ),
.datab(fault_counter[12]),
.datac(fault_counter[13]),
.datad(fault_counter[16]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~2_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~2 .lut_mask = "d500";
defparam \fault_flag~2 .operation_mode = "normal";
defparam \fault_flag~2 .output_mode = "comb_only";
defparam \fault_flag~2 .register_cascade_mode = "off";
defparam \fault_flag~2 .sum_lutc_input = "datac";
defparam \fault_flag~2 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y7_N0
maxii_lcell \fault_flag~3 (
// Equation(s):
// \fault_flag~3_combout = (fault_counter[1] & (fault_counter[3] & (fault_counter[2] & fault_counter[0])))
.clk(gnd),
.dataa(fault_counter[1]),
.datab(fault_counter[3]),
.datac(fault_counter[2]),
.datad(fault_counter[0]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~3_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~3 .lut_mask = "8000";
defparam \fault_flag~3 .operation_mode = "normal";
defparam \fault_flag~3 .output_mode = "comb_only";
defparam \fault_flag~3 .register_cascade_mode = "off";
defparam \fault_flag~3 .sum_lutc_input = "datac";
defparam \fault_flag~3 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N8
maxii_lcell \fault_flag~4 (
// Equation(s):
// \fault_flag~4_combout = (fault_counter[7] & (fault_counter[6] & (fault_counter[4] & fault_counter[5])))
.clk(gnd),
.dataa(fault_counter[7]),
.datab(fault_counter[6]),
.datac(fault_counter[4]),
.datad(fault_counter[5]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~4_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~4 .lut_mask = "8000";
defparam \fault_flag~4 .operation_mode = "normal";
defparam \fault_flag~4 .output_mode = "comb_only";
defparam \fault_flag~4 .register_cascade_mode = "off";
defparam \fault_flag~4 .sum_lutc_input = "datac";
defparam \fault_flag~4 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N1
maxii_lcell \fault_flag~5 (
// Equation(s):
// \fault_flag~5_combout = (fault_counter[8]) # ((fault_counter[9]) # ((\fault_flag~3_combout & \fault_flag~4_combout )))
.clk(gnd),
.dataa(\fault_flag~3_combout ),
.datab(fault_counter[8]),
.datac(fault_counter[9]),
.datad(\fault_flag~4_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~5_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~5 .lut_mask = "fefc";
defparam \fault_flag~5 .operation_mode = "normal";
defparam \fault_flag~5 .output_mode = "comb_only";
defparam \fault_flag~5 .register_cascade_mode = "off";
defparam \fault_flag~5 .sum_lutc_input = "datac";
defparam \fault_flag~5 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N2
maxii_lcell \fault_flag~8 (
// Equation(s):
// \fault_flag~8_combout = ((\fault_flag~2_combout ) # ((\fault_flag~6_combout & \fault_flag~5_combout ))) # (!\fault_flag~7_combout )
.clk(gnd),
.dataa(\fault_flag~7_combout ),
.datab(\fault_flag~6_combout ),
.datac(\fault_flag~2_combout ),
.datad(\fault_flag~5_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~8_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~8 .lut_mask = "fdf5";
defparam \fault_flag~8 .operation_mode = "normal";
defparam \fault_flag~8 .output_mode = "comb_only";
defparam \fault_flag~8 .register_cascade_mode = "off";
defparam \fault_flag~8 .sum_lutc_input = "datac";
defparam \fault_flag~8 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N3
maxii_lcell \fault_flag~9 (
// Equation(s):
// \fault_flag~9_combout = (fault_counter[24] & (fault_counter[21] & (fault_counter[20] & \fault_flag~8_combout )))
.clk(gnd),
.dataa(fault_counter[24]),
.datab(fault_counter[21]),
.datac(fault_counter[20]),
.datad(\fault_flag~8_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~9_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~9 .lut_mask = "8000";
defparam \fault_flag~9 .operation_mode = "normal";
defparam \fault_flag~9 .output_mode = "comb_only";
defparam \fault_flag~9 .register_cascade_mode = "off";
defparam \fault_flag~9 .sum_lutc_input = "datac";
defparam \fault_flag~9 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X3_Y8_N4
maxii_lcell \fault_flag[1][0] (
// Equation(s):
// \fault_flag[1][0]~regout = DFFEAS((!\Equal0~1 & ((\fault_flag~10_combout ) # ((\fault_flag~9_combout ) # (!\fault_counter[26]~68_combout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag~10_combout ),
.datab(\Equal0~1 ),
.datac(\fault_counter[26]~68_combout ),
.datad(\fault_flag~9_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\fault_flag[1][0]~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag[1][0] .lut_mask = "3323";
defparam \fault_flag[1][0] .operation_mode = "normal";
defparam \fault_flag[1][0] .output_mode = "reg_only";
defparam \fault_flag[1][0] .register_cascade_mode = "off";
defparam \fault_flag[1][0] .sum_lutc_input = "datac";
defparam \fault_flag[1][0] .synch_mode = "off";
// synopsys translate_on
// Location: PIN_39, I/O Standard: 3.3-V LVTTL, Current Strength: Default
maxii_io \line_sen~I (
.datain(gnd),
.oe(gnd),
.combout(\line_sen~combout ),
.padio(line_sen));
// synopsys translate_off
defparam \line_sen~I .operation_mode = "input";
// synopsys translate_on
// Location: LC_X7_Y7_N2
maxii_lcell \cache_line_sen[0] (
// Equation(s):
// \Equal1~1 = ((\line_sen~combout & (cache_line_sen[0] & \Equal1~0 )))
// cache_line_sen[0] = DFFEAS(\Equal1~1 , GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , \line_sen~combout , , , VCC)
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\line_sen~combout ),
.datac(\line_sen~combout ),
.datad(\Equal1~0 ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal1~1 ),
.regout(cache_line_sen[0]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sen[0] .lut_mask = "c000";
defparam \cache_line_sen[0] .operation_mode = "normal";
defparam \cache_line_sen[0] .output_mode = "reg_and_comb";
defparam \cache_line_sen[0] .register_cascade_mode = "off";
defparam \cache_line_sen[0] .sum_lutc_input = "qfbk";
defparam \cache_line_sen[0] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y7_N8
maxii_lcell \cache_line_sen[1] (
// Equation(s):
// cache_line_sen[1] = DFFEAS((((cache_line_sen[0]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(cache_line_sen[0]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sen[1]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sen[1] .lut_mask = "ff00";
defparam \cache_line_sen[1] .operation_mode = "normal";
defparam \cache_line_sen[1] .output_mode = "reg_only";
defparam \cache_line_sen[1] .register_cascade_mode = "off";
defparam \cache_line_sen[1] .sum_lutc_input = "datac";
defparam \cache_line_sen[1] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y7_N3
maxii_lcell \cache_line_sen[2] (
// Equation(s):
// cache_line_sen[2] = DFFEAS((((cache_line_sen[1]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(cache_line_sen[1]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sen[2]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sen[2] .lut_mask = "ff00";
defparam \cache_line_sen[2] .operation_mode = "normal";
defparam \cache_line_sen[2] .output_mode = "reg_only";
defparam \cache_line_sen[2] .register_cascade_mode = "off";
defparam \cache_line_sen[2] .sum_lutc_input = "datac";
defparam \cache_line_sen[2] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y7_N1
maxii_lcell \cache_line_sen[3] (
// Equation(s):
// \Equal1~0 = (cache_line_sen[1] & (!cache_line_sen[4] & (cache_line_sen[3] & cache_line_sen[2])))
// cache_line_sen[3] = DFFEAS(\Equal1~0 , GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , cache_line_sen[2], , , VCC)
.clk(\sys_clk~combout ),
.dataa(cache_line_sen[1]),
.datab(cache_line_sen[4]),
.datac(cache_line_sen[2]),
.datad(cache_line_sen[2]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal1~0 ),
.regout(cache_line_sen[3]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sen[3] .lut_mask = "2000";
defparam \cache_line_sen[3] .operation_mode = "normal";
defparam \cache_line_sen[3] .output_mode = "reg_and_comb";
defparam \cache_line_sen[3] .register_cascade_mode = "off";
defparam \cache_line_sen[3] .sum_lutc_input = "qfbk";
defparam \cache_line_sen[3] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y7_N0
maxii_lcell \cache_line_sen[4] (
// Equation(s):
// \Equal2~0 = (!cache_line_sen[1] & (!cache_line_sen[3] & (cache_line_sen[4] & !cache_line_sen[2])))
// cache_line_sen[4] = DFFEAS(\Equal2~0 , GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , cache_line_sen[3], , , VCC)
.clk(\sys_clk~combout ),
.dataa(cache_line_sen[1]),
.datab(cache_line_sen[3]),
.datac(cache_line_sen[3]),
.datad(cache_line_sen[2]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal2~0 ),
.regout(cache_line_sen[4]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sen[4] .lut_mask = "0010";
defparam \cache_line_sen[4] .operation_mode = "normal";
defparam \cache_line_sen[4] .output_mode = "reg_and_comb";
defparam \cache_line_sen[4] .register_cascade_mode = "off";
defparam \cache_line_sen[4] .sum_lutc_input = "qfbk";
defparam \cache_line_sen[4] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y7_N6
maxii_lcell negedge_line_sen(
// Equation(s):
// \Equal2~1 = ((!cache_line_sen[0] & (\Equal2~0 & !\line_sen~combout )))
// \negedge_line_sen~regout = DFFEAS(\Equal2~1 , GLOBAL(\sys_clk~combout ), VCC, , \rst_n~combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache_line_sen[0]),
.datac(\Equal2~0 ),
.datad(\line_sen~combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\rst_n~combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal2~1 ),
.regout(\negedge_line_sen~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam negedge_line_sen.lut_mask = "0030";
defparam negedge_line_sen.operation_mode = "normal";
defparam negedge_line_sen.output_mode = "reg_and_comb";
defparam negedge_line_sen.register_cascade_mode = "off";
defparam negedge_line_sen.sum_lutc_input = "datac";
defparam negedge_line_sen.synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N4
maxii_lcell filter_line_sen(
// Equation(s):
// \filter_line_sen~regout = DFFEAS(((\Equal1~1 ) # ((\filter_line_sen~regout & !\Equal2~1 ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\filter_line_sen~regout ),
.datab(vcc),
.datac(\Equal1~1 ),
.datad(\Equal2~1 ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\filter_line_sen~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam filter_line_sen.lut_mask = "f0fa";
defparam filter_line_sen.operation_mode = "normal";
defparam filter_line_sen.output_mode = "reg_only";
defparam filter_line_sen.register_cascade_mode = "off";
defparam filter_line_sen.sum_lutc_input = "datac";
defparam filter_line_sen.synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y7_N7
maxii_lcell \i[26]~69 (
// Equation(s):
// \i[26]~69_combout = (\negedge_line_sen~regout ) # ((\cnt_for_high_voltage_time~128_combout ) # ((\posedge_line_sclk~regout & \filter_line_sen~regout )))
.clk(gnd),
.dataa(\posedge_line_sclk~regout ),
.datab(\filter_line_sen~regout ),
.datac(\negedge_line_sen~regout ),
.datad(\cnt_for_high_voltage_time~128_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\i[26]~69_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[26]~69 .lut_mask = "fff8";
defparam \i[26]~69 .operation_mode = "normal";
defparam \i[26]~69 .output_mode = "comb_only";
defparam \i[26]~69 .register_cascade_mode = "off";
defparam \i[26]~69 .sum_lutc_input = "datac";
defparam \i[26]~69 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y10_N4
maxii_lcell \i[0] (
// Equation(s):
// i[0] = DFFEAS((!i[0]), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[0]~9 = CARRY((i[0]))
.clk(\sys_clk~combout ),
.dataa(i[0]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[0]),
.cout(\i[0]~9 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[0] .lut_mask = "55aa";
defparam \i[0] .operation_mode = "arithmetic";
defparam \i[0] .output_mode = "reg_only";
defparam \i[0] .register_cascade_mode = "off";
defparam \i[0] .sum_lutc_input = "datac";
defparam \i[0] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y10_N5
maxii_lcell \i[1] (
// Equation(s):
// i[1] = DFFEAS(i[1] $ ((((\i[0]~9 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[1]~11 = CARRY(((!\i[0]~9 )) # (!i[1]))
// \i[1]~11COUT1_71 = CARRY(((!\i[0]~9 )) # (!i[1]))
.clk(\sys_clk~combout ),
.dataa(i[1]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[0]~9 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[1]),
.cout(),
.cout0(\i[1]~11 ),
.cout1(\i[1]~11COUT1_71 ));
// synopsys translate_off
defparam \i[1] .cin_used = "true";
defparam \i[1] .lut_mask = "5a5f";
defparam \i[1] .operation_mode = "arithmetic";
defparam \i[1] .output_mode = "reg_only";
defparam \i[1] .register_cascade_mode = "off";
defparam \i[1] .sum_lutc_input = "cin";
defparam \i[1] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y10_N6
maxii_lcell \i[2] (
// Equation(s):
// i[2] = DFFEAS(i[2] $ ((((!(!\i[0]~9 & \i[1]~11 ) # (\i[0]~9 & \i[1]~11COUT1_71 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[2]~13 = CARRY((i[2] & ((!\i[1]~11 ))))
// \i[2]~13COUT1_72 = CARRY((i[2] & ((!\i[1]~11COUT1_71 ))))
.clk(\sys_clk~combout ),
.dataa(i[2]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[0]~9 ),
.cin0(\i[1]~11 ),
.cin1(\i[1]~11COUT1_71 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[2]),
.cout(),
.cout0(\i[2]~13 ),
.cout1(\i[2]~13COUT1_72 ));
// synopsys translate_off
defparam \i[2] .cin0_used = "true";
defparam \i[2] .cin1_used = "true";
defparam \i[2] .cin_used = "true";
defparam \i[2] .lut_mask = "a50a";
defparam \i[2] .operation_mode = "arithmetic";
defparam \i[2] .output_mode = "reg_only";
defparam \i[2] .register_cascade_mode = "off";
defparam \i[2] .sum_lutc_input = "cin";
defparam \i[2] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y10_N7
maxii_lcell \i[3] (
// Equation(s):
// i[3] = DFFEAS((i[3] $ (((!\i[0]~9 & \i[2]~13 ) # (\i[0]~9 & \i[2]~13COUT1_72 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[3]~15 = CARRY(((!\i[2]~13 ) # (!i[3])))
// \i[3]~15COUT1_73 = CARRY(((!\i[2]~13COUT1_72 ) # (!i[3])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[3]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[0]~9 ),
.cin0(\i[2]~13 ),
.cin1(\i[2]~13COUT1_72 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[3]),
.cout(),
.cout0(\i[3]~15 ),
.cout1(\i[3]~15COUT1_73 ));
// synopsys translate_off
defparam \i[3] .cin0_used = "true";
defparam \i[3] .cin1_used = "true";
defparam \i[3] .cin_used = "true";
defparam \i[3] .lut_mask = "3c3f";
defparam \i[3] .operation_mode = "arithmetic";
defparam \i[3] .output_mode = "reg_only";
defparam \i[3] .register_cascade_mode = "off";
defparam \i[3] .sum_lutc_input = "cin";
defparam \i[3] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X5_Y10_N8
maxii_lcell \i[4] (
// Equation(s):
// i[4] = DFFEAS(i[4] $ ((((!(!\i[0]~9 & \i[3]~15 ) # (\i[0]~9 & \i[3]~15COUT1_73 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[4]~5 = CARRY((i[4] & ((!\i[3]~15 ))))
// \i[4]~5COUT1_74 = CARRY((i[4] & ((!\i[3]~15COUT1_73 ))))
.clk(\sys_clk~combout ),
.dataa(i[4]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[0]~9 ),
.cin0(\i[3]~15 ),
.cin1(\i[3]~15COUT1_73 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[4]),
.cout(),
.cout0(\i[4]~5 ),
.cout1(\i[4]~5COUT1_74 ));
// synopsys translate_off
defparam \i[4] .cin0_used = "true";
defparam \i[4] .cin1_used = "true";
defparam \i[4] .cin_used = "true";
defparam \i[4] .lut_mask = "a50a";
defparam \i[4] .operation_mode = "arithmetic";
defparam \i[4] .output_mode = "reg_only";
defparam \i[4] .register_cascade_mode = "off";
defparam \i[4] .sum_lutc_input = "cin";
defparam \i[4] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X9_Y10_N3
maxii_lcell posedge_line_sclk(
// Equation(s):
// \Decoder0~65 = (\filter_line_sen~regout & (!i[4] & (posedge_line_sclk & \recv_complete~9_combout )))
// \posedge_line_sclk~regout = DFFEAS(\Decoder0~65 , GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , \Equal0~1 , , , VCC)
.clk(\sys_clk~combout ),
.dataa(\filter_line_sen~regout ),
.datab(i[4]),
.datac(\Equal0~1 ),
.datad(\recv_complete~9_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~65 ),
.regout(\posedge_line_sclk~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam posedge_line_sclk.lut_mask = "2000";
defparam posedge_line_sclk.operation_mode = "normal";
defparam posedge_line_sclk.output_mode = "reg_and_comb";
defparam posedge_line_sclk.register_cascade_mode = "off";
defparam posedge_line_sclk.sum_lutc_input = "qfbk";
defparam posedge_line_sclk.synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y7_N9
maxii_lcell \i[26]~68 (
// Equation(s):
// \i[26]~68_combout = (\fault_flag[0][0]~regout ) # ((\fault_flag[1][0]~regout ) # ((!\filter_line_sen~regout ) # (!\posedge_line_sclk~regout )))
.clk(gnd),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(\posedge_line_sclk~regout ),
.datad(\filter_line_sen~regout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\i[26]~68_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[26]~68 .lut_mask = "efff";
defparam \i[26]~68 .operation_mode = "normal";
defparam \i[26]~68 .output_mode = "comb_only";
defparam \i[26]~68 .register_cascade_mode = "off";
defparam \i[26]~68 .sum_lutc_input = "datac";
defparam \i[26]~68 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y10_N9
maxii_lcell \i[5] (
// Equation(s):
// i[5] = DFFEAS((i[5] $ (((!\i[0]~9 & \i[4]~5 ) # (\i[0]~9 & \i[4]~5COUT1_74 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[5]~7 = CARRY(((!\i[4]~5COUT1_74 ) # (!i[5])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[5]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[0]~9 ),
.cin0(\i[4]~5 ),
.cin1(\i[4]~5COUT1_74 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[5]),
.cout(\i[5]~7 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[5] .cin0_used = "true";
defparam \i[5] .cin1_used = "true";
defparam \i[5] .cin_used = "true";
defparam \i[5] .lut_mask = "3c3f";
defparam \i[5] .operation_mode = "arithmetic";
defparam \i[5] .output_mode = "reg_only";
defparam \i[5] .register_cascade_mode = "off";
defparam \i[5] .sum_lutc_input = "cin";
defparam \i[5] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N0
maxii_lcell \i[6] (
// Equation(s):
// i[6] = DFFEAS((i[6] $ ((!\i[5]~7 ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[6]~17 = CARRY(((i[6] & !\i[5]~7 )))
// \i[6]~17COUT1_75 = CARRY(((i[6] & !\i[5]~7 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[6]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[5]~7 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[6]),
.cout(),
.cout0(\i[6]~17 ),
.cout1(\i[6]~17COUT1_75 ));
// synopsys translate_off
defparam \i[6] .cin_used = "true";
defparam \i[6] .lut_mask = "c30c";
defparam \i[6] .operation_mode = "arithmetic";
defparam \i[6] .output_mode = "reg_only";
defparam \i[6] .register_cascade_mode = "off";
defparam \i[6] .sum_lutc_input = "cin";
defparam \i[6] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N1
maxii_lcell \i[7] (
// Equation(s):
// i[7] = DFFEAS((i[7] $ (((!\i[5]~7 & \i[6]~17 ) # (\i[5]~7 & \i[6]~17COUT1_75 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[7]~19 = CARRY(((!\i[6]~17 ) # (!i[7])))
// \i[7]~19COUT1_76 = CARRY(((!\i[6]~17COUT1_75 ) # (!i[7])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[7]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[5]~7 ),
.cin0(\i[6]~17 ),
.cin1(\i[6]~17COUT1_75 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[7]),
.cout(),
.cout0(\i[7]~19 ),
.cout1(\i[7]~19COUT1_76 ));
// synopsys translate_off
defparam \i[7] .cin0_used = "true";
defparam \i[7] .cin1_used = "true";
defparam \i[7] .cin_used = "true";
defparam \i[7] .lut_mask = "3c3f";
defparam \i[7] .operation_mode = "arithmetic";
defparam \i[7] .output_mode = "reg_only";
defparam \i[7] .register_cascade_mode = "off";
defparam \i[7] .sum_lutc_input = "cin";
defparam \i[7] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N2
maxii_lcell \i[8] (
// Equation(s):
// i[8] = DFFEAS((i[8] $ ((!(!\i[5]~7 & \i[7]~19 ) # (\i[5]~7 & \i[7]~19COUT1_76 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[8]~29 = CARRY(((i[8] & !\i[7]~19 )))
// \i[8]~29COUT1_77 = CARRY(((i[8] & !\i[7]~19COUT1_76 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[8]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[5]~7 ),
.cin0(\i[7]~19 ),
.cin1(\i[7]~19COUT1_76 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[8]),
.cout(),
.cout0(\i[8]~29 ),
.cout1(\i[8]~29COUT1_77 ));
// synopsys translate_off
defparam \i[8] .cin0_used = "true";
defparam \i[8] .cin1_used = "true";
defparam \i[8] .cin_used = "true";
defparam \i[8] .lut_mask = "c30c";
defparam \i[8] .operation_mode = "arithmetic";
defparam \i[8] .output_mode = "reg_only";
defparam \i[8] .register_cascade_mode = "off";
defparam \i[8] .sum_lutc_input = "cin";
defparam \i[8] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N3
maxii_lcell \i[9] (
// Equation(s):
// i[9] = DFFEAS(i[9] $ (((((!\i[5]~7 & \i[8]~29 ) # (\i[5]~7 & \i[8]~29COUT1_77 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[9]~31 = CARRY(((!\i[8]~29 )) # (!i[9]))
// \i[9]~31COUT1_78 = CARRY(((!\i[8]~29COUT1_77 )) # (!i[9]))
.clk(\sys_clk~combout ),
.dataa(i[9]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[5]~7 ),
.cin0(\i[8]~29 ),
.cin1(\i[8]~29COUT1_77 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[9]),
.cout(),
.cout0(\i[9]~31 ),
.cout1(\i[9]~31COUT1_78 ));
// synopsys translate_off
defparam \i[9] .cin0_used = "true";
defparam \i[9] .cin1_used = "true";
defparam \i[9] .cin_used = "true";
defparam \i[9] .lut_mask = "5a5f";
defparam \i[9] .operation_mode = "arithmetic";
defparam \i[9] .output_mode = "reg_only";
defparam \i[9] .register_cascade_mode = "off";
defparam \i[9] .sum_lutc_input = "cin";
defparam \i[9] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N4
maxii_lcell \i[10] (
// Equation(s):
// i[10] = DFFEAS(i[10] $ ((((!(!\i[5]~7 & \i[9]~31 ) # (\i[5]~7 & \i[9]~31COUT1_78 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[10]~21 = CARRY((i[10] & ((!\i[9]~31COUT1_78 ))))
.clk(\sys_clk~combout ),
.dataa(i[10]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[5]~7 ),
.cin0(\i[9]~31 ),
.cin1(\i[9]~31COUT1_78 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[10]),
.cout(\i[10]~21 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[10] .cin0_used = "true";
defparam \i[10] .cin1_used = "true";
defparam \i[10] .cin_used = "true";
defparam \i[10] .lut_mask = "a50a";
defparam \i[10] .operation_mode = "arithmetic";
defparam \i[10] .output_mode = "reg_only";
defparam \i[10] .register_cascade_mode = "off";
defparam \i[10] .sum_lutc_input = "cin";
defparam \i[10] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N5
maxii_lcell \i[11] (
// Equation(s):
// i[11] = DFFEAS(i[11] $ ((((\i[10]~21 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[11]~23 = CARRY(((!\i[10]~21 )) # (!i[11]))
// \i[11]~23COUT1_79 = CARRY(((!\i[10]~21 )) # (!i[11]))
.clk(\sys_clk~combout ),
.dataa(i[11]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[10]~21 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[11]),
.cout(),
.cout0(\i[11]~23 ),
.cout1(\i[11]~23COUT1_79 ));
// synopsys translate_off
defparam \i[11] .cin_used = "true";
defparam \i[11] .lut_mask = "5a5f";
defparam \i[11] .operation_mode = "arithmetic";
defparam \i[11] .output_mode = "reg_only";
defparam \i[11] .register_cascade_mode = "off";
defparam \i[11] .sum_lutc_input = "cin";
defparam \i[11] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N6
maxii_lcell \i[12] (
// Equation(s):
// i[12] = DFFEAS(i[12] $ ((((!(!\i[10]~21 & \i[11]~23 ) # (\i[10]~21 & \i[11]~23COUT1_79 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[12]~25 = CARRY((i[12] & ((!\i[11]~23 ))))
// \i[12]~25COUT1_80 = CARRY((i[12] & ((!\i[11]~23COUT1_79 ))))
.clk(\sys_clk~combout ),
.dataa(i[12]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[10]~21 ),
.cin0(\i[11]~23 ),
.cin1(\i[11]~23COUT1_79 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[12]),
.cout(),
.cout0(\i[12]~25 ),
.cout1(\i[12]~25COUT1_80 ));
// synopsys translate_off
defparam \i[12] .cin0_used = "true";
defparam \i[12] .cin1_used = "true";
defparam \i[12] .cin_used = "true";
defparam \i[12] .lut_mask = "a50a";
defparam \i[12] .operation_mode = "arithmetic";
defparam \i[12] .output_mode = "reg_only";
defparam \i[12] .register_cascade_mode = "off";
defparam \i[12] .sum_lutc_input = "cin";
defparam \i[12] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N7
maxii_lcell \i[13] (
// Equation(s):
// i[13] = DFFEAS((i[13] $ (((!\i[10]~21 & \i[12]~25 ) # (\i[10]~21 & \i[12]~25COUT1_80 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[13]~27 = CARRY(((!\i[12]~25 ) # (!i[13])))
// \i[13]~27COUT1_81 = CARRY(((!\i[12]~25COUT1_80 ) # (!i[13])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[13]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[10]~21 ),
.cin0(\i[12]~25 ),
.cin1(\i[12]~25COUT1_80 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[13]),
.cout(),
.cout0(\i[13]~27 ),
.cout1(\i[13]~27COUT1_81 ));
// synopsys translate_off
defparam \i[13] .cin0_used = "true";
defparam \i[13] .cin1_used = "true";
defparam \i[13] .cin_used = "true";
defparam \i[13] .lut_mask = "3c3f";
defparam \i[13] .operation_mode = "arithmetic";
defparam \i[13] .output_mode = "reg_only";
defparam \i[13] .register_cascade_mode = "off";
defparam \i[13] .sum_lutc_input = "cin";
defparam \i[13] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N8
maxii_lcell \i[14] (
// Equation(s):
// i[14] = DFFEAS(i[14] $ ((((!(!\i[10]~21 & \i[13]~27 ) # (\i[10]~21 & \i[13]~27COUT1_81 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[14]~33 = CARRY((i[14] & ((!\i[13]~27 ))))
// \i[14]~33COUT1_82 = CARRY((i[14] & ((!\i[13]~27COUT1_81 ))))
.clk(\sys_clk~combout ),
.dataa(i[14]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[10]~21 ),
.cin0(\i[13]~27 ),
.cin1(\i[13]~27COUT1_81 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[14]),
.cout(),
.cout0(\i[14]~33 ),
.cout1(\i[14]~33COUT1_82 ));
// synopsys translate_off
defparam \i[14] .cin0_used = "true";
defparam \i[14] .cin1_used = "true";
defparam \i[14] .cin_used = "true";
defparam \i[14] .lut_mask = "a50a";
defparam \i[14] .operation_mode = "arithmetic";
defparam \i[14] .output_mode = "reg_only";
defparam \i[14] .register_cascade_mode = "off";
defparam \i[14] .sum_lutc_input = "cin";
defparam \i[14] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y10_N9
maxii_lcell \i[15] (
// Equation(s):
// i[15] = DFFEAS((i[15] $ (((!\i[10]~21 & \i[14]~33 ) # (\i[10]~21 & \i[14]~33COUT1_82 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[15]~35 = CARRY(((!\i[14]~33COUT1_82 ) # (!i[15])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[15]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[10]~21 ),
.cin0(\i[14]~33 ),
.cin1(\i[14]~33COUT1_82 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[15]),
.cout(\i[15]~35 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[15] .cin0_used = "true";
defparam \i[15] .cin1_used = "true";
defparam \i[15] .cin_used = "true";
defparam \i[15] .lut_mask = "3c3f";
defparam \i[15] .operation_mode = "arithmetic";
defparam \i[15] .output_mode = "reg_only";
defparam \i[15] .register_cascade_mode = "off";
defparam \i[15] .sum_lutc_input = "cin";
defparam \i[15] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N0
maxii_lcell \i[16] (
// Equation(s):
// i[16] = DFFEAS((i[16] $ ((!\i[15]~35 ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[16]~37 = CARRY(((i[16] & !\i[15]~35 )))
// \i[16]~37COUT1_83 = CARRY(((i[16] & !\i[15]~35 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[16]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[15]~35 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[16]),
.cout(),
.cout0(\i[16]~37 ),
.cout1(\i[16]~37COUT1_83 ));
// synopsys translate_off
defparam \i[16] .cin_used = "true";
defparam \i[16] .lut_mask = "c30c";
defparam \i[16] .operation_mode = "arithmetic";
defparam \i[16] .output_mode = "reg_only";
defparam \i[16] .register_cascade_mode = "off";
defparam \i[16] .sum_lutc_input = "cin";
defparam \i[16] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N1
maxii_lcell \i[17] (
// Equation(s):
// i[17] = DFFEAS((i[17] $ (((!\i[15]~35 & \i[16]~37 ) # (\i[15]~35 & \i[16]~37COUT1_83 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[17]~39 = CARRY(((!\i[16]~37 ) # (!i[17])))
// \i[17]~39COUT1_84 = CARRY(((!\i[16]~37COUT1_83 ) # (!i[17])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[17]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[15]~35 ),
.cin0(\i[16]~37 ),
.cin1(\i[16]~37COUT1_83 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[17]),
.cout(),
.cout0(\i[17]~39 ),
.cout1(\i[17]~39COUT1_84 ));
// synopsys translate_off
defparam \i[17] .cin0_used = "true";
defparam \i[17] .cin1_used = "true";
defparam \i[17] .cin_used = "true";
defparam \i[17] .lut_mask = "3c3f";
defparam \i[17] .operation_mode = "arithmetic";
defparam \i[17] .output_mode = "reg_only";
defparam \i[17] .register_cascade_mode = "off";
defparam \i[17] .sum_lutc_input = "cin";
defparam \i[17] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X9_Y10_N6
maxii_lcell \recv_complete~4 (
// Equation(s):
// \recv_complete~4_combout = (!i[15] & (!i[17] & (!i[14] & !i[16])))
.clk(gnd),
.dataa(i[15]),
.datab(i[17]),
.datac(i[14]),
.datad(i[16]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~4_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~4 .lut_mask = "0001";
defparam \recv_complete~4 .operation_mode = "normal";
defparam \recv_complete~4 .output_mode = "comb_only";
defparam \recv_complete~4 .register_cascade_mode = "off";
defparam \recv_complete~4 .sum_lutc_input = "datac";
defparam \recv_complete~4 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y10_N2
maxii_lcell \i[18] (
// Equation(s):
// i[18] = DFFEAS((i[18] $ ((!(!\i[15]~35 & \i[17]~39 ) # (\i[15]~35 & \i[17]~39COUT1_84 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[18]~41 = CARRY(((i[18] & !\i[17]~39 )))
// \i[18]~41COUT1_85 = CARRY(((i[18] & !\i[17]~39COUT1_84 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[18]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[15]~35 ),
.cin0(\i[17]~39 ),
.cin1(\i[17]~39COUT1_84 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[18]),
.cout(),
.cout0(\i[18]~41 ),
.cout1(\i[18]~41COUT1_85 ));
// synopsys translate_off
defparam \i[18] .cin0_used = "true";
defparam \i[18] .cin1_used = "true";
defparam \i[18] .cin_used = "true";
defparam \i[18] .lut_mask = "c30c";
defparam \i[18] .operation_mode = "arithmetic";
defparam \i[18] .output_mode = "reg_only";
defparam \i[18] .register_cascade_mode = "off";
defparam \i[18] .sum_lutc_input = "cin";
defparam \i[18] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N3
maxii_lcell \i[19] (
// Equation(s):
// i[19] = DFFEAS(i[19] $ (((((!\i[15]~35 & \i[18]~41 ) # (\i[15]~35 & \i[18]~41COUT1_85 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[19]~43 = CARRY(((!\i[18]~41 )) # (!i[19]))
// \i[19]~43COUT1_86 = CARRY(((!\i[18]~41COUT1_85 )) # (!i[19]))
.clk(\sys_clk~combout ),
.dataa(i[19]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[15]~35 ),
.cin0(\i[18]~41 ),
.cin1(\i[18]~41COUT1_85 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[19]),
.cout(),
.cout0(\i[19]~43 ),
.cout1(\i[19]~43COUT1_86 ));
// synopsys translate_off
defparam \i[19] .cin0_used = "true";
defparam \i[19] .cin1_used = "true";
defparam \i[19] .cin_used = "true";
defparam \i[19] .lut_mask = "5a5f";
defparam \i[19] .operation_mode = "arithmetic";
defparam \i[19] .output_mode = "reg_only";
defparam \i[19] .register_cascade_mode = "off";
defparam \i[19] .sum_lutc_input = "cin";
defparam \i[19] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N4
maxii_lcell \i[20] (
// Equation(s):
// i[20] = DFFEAS(i[20] $ ((((!(!\i[15]~35 & \i[19]~43 ) # (\i[15]~35 & \i[19]~43COUT1_86 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[20]~45 = CARRY((i[20] & ((!\i[19]~43COUT1_86 ))))
.clk(\sys_clk~combout ),
.dataa(i[20]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[15]~35 ),
.cin0(\i[19]~43 ),
.cin1(\i[19]~43COUT1_86 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[20]),
.cout(\i[20]~45 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[20] .cin0_used = "true";
defparam \i[20] .cin1_used = "true";
defparam \i[20] .cin_used = "true";
defparam \i[20] .lut_mask = "a50a";
defparam \i[20] .operation_mode = "arithmetic";
defparam \i[20] .output_mode = "reg_only";
defparam \i[20] .register_cascade_mode = "off";
defparam \i[20] .sum_lutc_input = "cin";
defparam \i[20] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N5
maxii_lcell \i[21] (
// Equation(s):
// i[21] = DFFEAS(i[21] $ ((((\i[20]~45 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[21]~47 = CARRY(((!\i[20]~45 )) # (!i[21]))
// \i[21]~47COUT1_87 = CARRY(((!\i[20]~45 )) # (!i[21]))
.clk(\sys_clk~combout ),
.dataa(i[21]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[20]~45 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[21]),
.cout(),
.cout0(\i[21]~47 ),
.cout1(\i[21]~47COUT1_87 ));
// synopsys translate_off
defparam \i[21] .cin_used = "true";
defparam \i[21] .lut_mask = "5a5f";
defparam \i[21] .operation_mode = "arithmetic";
defparam \i[21] .output_mode = "reg_only";
defparam \i[21] .register_cascade_mode = "off";
defparam \i[21] .sum_lutc_input = "cin";
defparam \i[21] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N6
maxii_lcell \recv_complete~5 (
// Equation(s):
// \recv_complete~5_combout = (!i[21] & (!i[20] & (!i[19] & !i[18])))
.clk(gnd),
.dataa(i[21]),
.datab(i[20]),
.datac(i[19]),
.datad(i[18]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~5_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~5 .lut_mask = "0001";
defparam \recv_complete~5 .operation_mode = "normal";
defparam \recv_complete~5 .output_mode = "comb_only";
defparam \recv_complete~5 .register_cascade_mode = "off";
defparam \recv_complete~5 .sum_lutc_input = "datac";
defparam \recv_complete~5 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N4
maxii_lcell \recv_complete~1 (
// Equation(s):
// \recv_complete~1_combout = (((!i[7] & !i[6])))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(i[7]),
.datad(i[6]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~1_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~1 .lut_mask = "000f";
defparam \recv_complete~1 .operation_mode = "normal";
defparam \recv_complete~1 .output_mode = "comb_only";
defparam \recv_complete~1 .register_cascade_mode = "off";
defparam \recv_complete~1 .sum_lutc_input = "datac";
defparam \recv_complete~1 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N9
maxii_lcell \recv_complete~2 (
// Equation(s):
// \recv_complete~2_combout = (!i[10] & (!i[12] & (!i[13] & !i[11])))
.clk(gnd),
.dataa(i[10]),
.datab(i[12]),
.datac(i[13]),
.datad(i[11]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~2_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~2 .lut_mask = "0001";
defparam \recv_complete~2 .operation_mode = "normal";
defparam \recv_complete~2 .output_mode = "comb_only";
defparam \recv_complete~2 .register_cascade_mode = "off";
defparam \recv_complete~2 .sum_lutc_input = "datac";
defparam \recv_complete~2 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N5
maxii_lcell \recv_complete~3 (
// Equation(s):
// \recv_complete~3_combout = (!i[8] & (!i[9] & (\recv_complete~1_combout & \recv_complete~2_combout )))
.clk(gnd),
.dataa(i[8]),
.datab(i[9]),
.datac(\recv_complete~1_combout ),
.datad(\recv_complete~2_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~3_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~3 .lut_mask = "1000";
defparam \recv_complete~3 .operation_mode = "normal";
defparam \recv_complete~3 .output_mode = "comb_only";
defparam \recv_complete~3 .register_cascade_mode = "off";
defparam \recv_complete~3 .sum_lutc_input = "datac";
defparam \recv_complete~3 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y10_N6
maxii_lcell \i[22] (
// Equation(s):
// i[22] = DFFEAS(i[22] $ ((((!(!\i[20]~45 & \i[21]~47 ) # (\i[20]~45 & \i[21]~47COUT1_87 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[22]~49 = CARRY((i[22] & ((!\i[21]~47 ))))
// \i[22]~49COUT1_88 = CARRY((i[22] & ((!\i[21]~47COUT1_87 ))))
.clk(\sys_clk~combout ),
.dataa(i[22]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[20]~45 ),
.cin0(\i[21]~47 ),
.cin1(\i[21]~47COUT1_87 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[22]),
.cout(),
.cout0(\i[22]~49 ),
.cout1(\i[22]~49COUT1_88 ));
// synopsys translate_off
defparam \i[22] .cin0_used = "true";
defparam \i[22] .cin1_used = "true";
defparam \i[22] .cin_used = "true";
defparam \i[22] .lut_mask = "a50a";
defparam \i[22] .operation_mode = "arithmetic";
defparam \i[22] .output_mode = "reg_only";
defparam \i[22] .register_cascade_mode = "off";
defparam \i[22] .sum_lutc_input = "cin";
defparam \i[22] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N7
maxii_lcell \i[23] (
// Equation(s):
// i[23] = DFFEAS((i[23] $ (((!\i[20]~45 & \i[22]~49 ) # (\i[20]~45 & \i[22]~49COUT1_88 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[23]~51 = CARRY(((!\i[22]~49 ) # (!i[23])))
// \i[23]~51COUT1_89 = CARRY(((!\i[22]~49COUT1_88 ) # (!i[23])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[23]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[20]~45 ),
.cin0(\i[22]~49 ),
.cin1(\i[22]~49COUT1_88 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[23]),
.cout(),
.cout0(\i[23]~51 ),
.cout1(\i[23]~51COUT1_89 ));
// synopsys translate_off
defparam \i[23] .cin0_used = "true";
defparam \i[23] .cin1_used = "true";
defparam \i[23] .cin_used = "true";
defparam \i[23] .lut_mask = "3c3f";
defparam \i[23] .operation_mode = "arithmetic";
defparam \i[23] .output_mode = "reg_only";
defparam \i[23] .register_cascade_mode = "off";
defparam \i[23] .sum_lutc_input = "cin";
defparam \i[23] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N8
maxii_lcell \i[24] (
// Equation(s):
// i[24] = DFFEAS(i[24] $ ((((!(!\i[20]~45 & \i[23]~51 ) # (\i[20]~45 & \i[23]~51COUT1_89 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[24]~53 = CARRY((i[24] & ((!\i[23]~51 ))))
// \i[24]~53COUT1_90 = CARRY((i[24] & ((!\i[23]~51COUT1_89 ))))
.clk(\sys_clk~combout ),
.dataa(i[24]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[20]~45 ),
.cin0(\i[23]~51 ),
.cin1(\i[23]~51COUT1_89 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[24]),
.cout(),
.cout0(\i[24]~53 ),
.cout1(\i[24]~53COUT1_90 ));
// synopsys translate_off
defparam \i[24] .cin0_used = "true";
defparam \i[24] .cin1_used = "true";
defparam \i[24] .cin_used = "true";
defparam \i[24] .lut_mask = "a50a";
defparam \i[24] .operation_mode = "arithmetic";
defparam \i[24] .output_mode = "reg_only";
defparam \i[24] .register_cascade_mode = "off";
defparam \i[24] .sum_lutc_input = "cin";
defparam \i[24] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X7_Y10_N9
maxii_lcell \i[25] (
// Equation(s):
// i[25] = DFFEAS((i[25] $ (((!\i[20]~45 & \i[24]~53 ) # (\i[20]~45 & \i[24]~53COUT1_90 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[25]~55 = CARRY(((!\i[24]~53COUT1_90 ) # (!i[25])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[25]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[20]~45 ),
.cin0(\i[24]~53 ),
.cin1(\i[24]~53COUT1_90 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[25]),
.cout(\i[25]~55 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[25] .cin0_used = "true";
defparam \i[25] .cin1_used = "true";
defparam \i[25] .cin_used = "true";
defparam \i[25] .lut_mask = "3c3f";
defparam \i[25] .operation_mode = "arithmetic";
defparam \i[25] .output_mode = "reg_only";
defparam \i[25] .register_cascade_mode = "off";
defparam \i[25] .sum_lutc_input = "cin";
defparam \i[25] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N0
maxii_lcell \i[26] (
// Equation(s):
// i[26] = DFFEAS((i[26] $ ((!\i[25]~55 ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[26]~57 = CARRY(((i[26] & !\i[25]~55 )))
// \i[26]~57COUT1_91 = CARRY(((i[26] & !\i[25]~55 )))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[26]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[25]~55 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[26]),
.cout(),
.cout0(\i[26]~57 ),
.cout1(\i[26]~57COUT1_91 ));
// synopsys translate_off
defparam \i[26] .cin_used = "true";
defparam \i[26] .lut_mask = "c30c";
defparam \i[26] .operation_mode = "arithmetic";
defparam \i[26] .output_mode = "reg_only";
defparam \i[26] .register_cascade_mode = "off";
defparam \i[26] .sum_lutc_input = "cin";
defparam \i[26] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N1
maxii_lcell \i[27] (
// Equation(s):
// i[27] = DFFEAS((i[27] $ (((!\i[25]~55 & \i[26]~57 ) # (\i[25]~55 & \i[26]~57COUT1_91 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[27]~59 = CARRY(((!\i[26]~57 ) # (!i[27])))
// \i[27]~59COUT1_92 = CARRY(((!\i[26]~57COUT1_91 ) # (!i[27])))
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(i[27]),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[25]~55 ),
.cin0(\i[26]~57 ),
.cin1(\i[26]~57COUT1_91 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[27]),
.cout(),
.cout0(\i[27]~59 ),
.cout1(\i[27]~59COUT1_92 ));
// synopsys translate_off
defparam \i[27] .cin0_used = "true";
defparam \i[27] .cin1_used = "true";
defparam \i[27] .cin_used = "true";
defparam \i[27] .lut_mask = "3c3f";
defparam \i[27] .operation_mode = "arithmetic";
defparam \i[27] .output_mode = "reg_only";
defparam \i[27] .register_cascade_mode = "off";
defparam \i[27] .sum_lutc_input = "cin";
defparam \i[27] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N2
maxii_lcell \i[28] (
// Equation(s):
// i[28] = DFFEAS(i[28] $ ((((!(!\i[25]~55 & \i[27]~59 ) # (\i[25]~55 & \i[27]~59COUT1_92 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[28]~61 = CARRY((i[28] & ((!\i[27]~59 ))))
// \i[28]~61COUT1_93 = CARRY((i[28] & ((!\i[27]~59COUT1_92 ))))
.clk(\sys_clk~combout ),
.dataa(i[28]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[25]~55 ),
.cin0(\i[27]~59 ),
.cin1(\i[27]~59COUT1_92 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[28]),
.cout(),
.cout0(\i[28]~61 ),
.cout1(\i[28]~61COUT1_93 ));
// synopsys translate_off
defparam \i[28] .cin0_used = "true";
defparam \i[28] .cin1_used = "true";
defparam \i[28] .cin_used = "true";
defparam \i[28] .lut_mask = "a50a";
defparam \i[28] .operation_mode = "arithmetic";
defparam \i[28] .output_mode = "reg_only";
defparam \i[28] .register_cascade_mode = "off";
defparam \i[28] .sum_lutc_input = "cin";
defparam \i[28] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N3
maxii_lcell \i[29] (
// Equation(s):
// i[29] = DFFEAS(i[29] $ (((((!\i[25]~55 & \i[28]~61 ) # (\i[25]~55 & \i[28]~61COUT1_93 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[29]~63 = CARRY(((!\i[28]~61 )) # (!i[29]))
// \i[29]~63COUT1_94 = CARRY(((!\i[28]~61COUT1_93 )) # (!i[29]))
.clk(\sys_clk~combout ),
.dataa(i[29]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[25]~55 ),
.cin0(\i[28]~61 ),
.cin1(\i[28]~61COUT1_93 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[29]),
.cout(),
.cout0(\i[29]~63 ),
.cout1(\i[29]~63COUT1_94 ));
// synopsys translate_off
defparam \i[29] .cin0_used = "true";
defparam \i[29] .cin1_used = "true";
defparam \i[29] .cin_used = "true";
defparam \i[29] .lut_mask = "5a5f";
defparam \i[29] .operation_mode = "arithmetic";
defparam \i[29] .output_mode = "reg_only";
defparam \i[29] .register_cascade_mode = "off";
defparam \i[29] .sum_lutc_input = "cin";
defparam \i[29] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N4
maxii_lcell \i[30] (
// Equation(s):
// i[30] = DFFEAS(i[30] $ ((((!(!\i[25]~55 & \i[29]~63 ) # (\i[25]~55 & \i[29]~63COUT1_94 ))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
// \i[30]~65 = CARRY((i[30] & ((!\i[29]~63COUT1_94 ))))
.clk(\sys_clk~combout ),
.dataa(i[30]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[25]~55 ),
.cin0(\i[29]~63 ),
.cin1(\i[29]~63COUT1_94 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[30]),
.cout(\i[30]~65 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[30] .cin0_used = "true";
defparam \i[30] .cin1_used = "true";
defparam \i[30] .cin_used = "true";
defparam \i[30] .lut_mask = "a50a";
defparam \i[30] .operation_mode = "arithmetic";
defparam \i[30] .output_mode = "reg_only";
defparam \i[30] .register_cascade_mode = "off";
defparam \i[30] .sum_lutc_input = "cin";
defparam \i[30] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N5
maxii_lcell \i[31] (
// Equation(s):
// i[31] = DFFEAS(i[31] $ ((((\i[30]~65 )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \i[26]~69_combout , , , \i[26]~68_combout , )
.clk(\sys_clk~combout ),
.dataa(i[31]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\i[26]~68_combout ),
.sload(gnd),
.ena(\i[26]~69_combout ),
.cin(\i[30]~65 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(i[31]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \i[31] .cin_used = "true";
defparam \i[31] .lut_mask = "5a5a";
defparam \i[31] .operation_mode = "normal";
defparam \i[31] .output_mode = "reg_only";
defparam \i[31] .register_cascade_mode = "off";
defparam \i[31] .sum_lutc_input = "cin";
defparam \i[31] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y10_N8
maxii_lcell \recv_complete~7 (
// Equation(s):
// \recv_complete~7_combout = (!i[28] & (!i[27] & (!i[26] & !i[29])))
.clk(gnd),
.dataa(i[28]),
.datab(i[27]),
.datac(i[26]),
.datad(i[29]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~7_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~7 .lut_mask = "0001";
defparam \recv_complete~7 .operation_mode = "normal";
defparam \recv_complete~7 .output_mode = "comb_only";
defparam \recv_complete~7 .register_cascade_mode = "off";
defparam \recv_complete~7 .sum_lutc_input = "datac";
defparam \recv_complete~7 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y10_N7
maxii_lcell \recv_complete~6 (
// Equation(s):
// \recv_complete~6_combout = (!i[25] & (!i[22] & (!i[24] & !i[23])))
.clk(gnd),
.dataa(i[25]),
.datab(i[22]),
.datac(i[24]),
.datad(i[23]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~6_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~6 .lut_mask = "0001";
defparam \recv_complete~6 .operation_mode = "normal";
defparam \recv_complete~6 .output_mode = "comb_only";
defparam \recv_complete~6 .register_cascade_mode = "off";
defparam \recv_complete~6 .sum_lutc_input = "datac";
defparam \recv_complete~6 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N7
maxii_lcell \recv_complete~8 (
// Equation(s):
// \recv_complete~8_combout = (!i[31] & (!i[30] & (\recv_complete~7_combout & \recv_complete~6_combout )))
.clk(gnd),
.dataa(i[31]),
.datab(i[30]),
.datac(\recv_complete~7_combout ),
.datad(\recv_complete~6_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~8_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~8 .lut_mask = "1000";
defparam \recv_complete~8 .operation_mode = "normal";
defparam \recv_complete~8 .output_mode = "comb_only";
defparam \recv_complete~8 .register_cascade_mode = "off";
defparam \recv_complete~8 .sum_lutc_input = "datac";
defparam \recv_complete~8 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N8
maxii_lcell \recv_complete~9 (
// Equation(s):
// \recv_complete~9_combout = (\recv_complete~4_combout & (\recv_complete~5_combout & (\recv_complete~3_combout & \recv_complete~8_combout )))
.clk(gnd),
.dataa(\recv_complete~4_combout ),
.datab(\recv_complete~5_combout ),
.datac(\recv_complete~3_combout ),
.datad(\recv_complete~8_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~9_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~9 .lut_mask = "8000";
defparam \recv_complete~9 .operation_mode = "normal";
defparam \recv_complete~9 .output_mode = "comb_only";
defparam \recv_complete~9 .register_cascade_mode = "off";
defparam \recv_complete~9 .sum_lutc_input = "datac";
defparam \recv_complete~9 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y10_N0
maxii_lcell \recv_complete~0 (
// Equation(s):
// \recv_complete~0_combout = (!i[1] & (!i[3] & (!i[2])))
.clk(gnd),
.dataa(i[1]),
.datab(i[3]),
.datac(i[2]),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~0_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~0 .lut_mask = "0101";
defparam \recv_complete~0 .operation_mode = "normal";
defparam \recv_complete~0 .output_mode = "comb_only";
defparam \recv_complete~0 .register_cascade_mode = "off";
defparam \recv_complete~0 .sum_lutc_input = "datac";
defparam \recv_complete~0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y10_N2
maxii_lcell \fault_flag~0 (
// Equation(s):
// \fault_flag~0_combout = (i[5] & (i[4] & ((i[0]) # (!\recv_complete~0_combout ))))
.clk(gnd),
.dataa(i[0]),
.datab(i[5]),
.datac(\recv_complete~0_combout ),
.datad(i[4]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\fault_flag~0_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag~0 .lut_mask = "8c00";
defparam \fault_flag~0 .operation_mode = "normal";
defparam \fault_flag~0 .output_mode = "comb_only";
defparam \fault_flag~0 .register_cascade_mode = "off";
defparam \fault_flag~0 .sum_lutc_input = "datac";
defparam \fault_flag~0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N1
maxii_lcell \fault_flag[0][0] (
// Equation(s):
// \fault_flag[0][0]~regout = DFFEAS(((\fault_flag~0_combout ) # ((!\Equal1~1 & \fault_flag[0][0]~regout ))) # (!\recv_complete~9_combout ), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\Equal1~1 ),
.datab(\fault_flag[0][0]~regout ),
.datac(\recv_complete~9_combout ),
.datad(\fault_flag~0_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\fault_flag[0][0]~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \fault_flag[0][0] .lut_mask = "ff4f";
defparam \fault_flag[0][0] .operation_mode = "normal";
defparam \fault_flag[0][0] .output_mode = "reg_only";
defparam \fault_flag[0][0] .register_cascade_mode = "off";
defparam \fault_flag[0][0] .sum_lutc_input = "datac";
defparam \fault_flag[0][0] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N5
maxii_lcell \cnt_for_high_voltage_time~128 (
// Equation(s):
// \cnt_for_high_voltage_time~128_combout = ((\fault_flag[0][0]~regout ) # ((\fault_flag[1][0]~regout )))
.clk(gnd),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(vcc),
.datad(\fault_flag[1][0]~regout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\cnt_for_high_voltage_time~128_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time~128 .lut_mask = "ffcc";
defparam \cnt_for_high_voltage_time~128 .operation_mode = "normal";
defparam \cnt_for_high_voltage_time~128 .output_mode = "comb_only";
defparam \cnt_for_high_voltage_time~128 .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time~128 .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time~128 .synch_mode = "off";
// synopsys translate_on
// Location: PIN_41, I/O Standard: 3.3-V LVTTL, Current Strength: Default
maxii_io \line_sdata~I (
.datain(gnd),
.oe(gnd),
.combout(\line_sdata~combout ),
.padio(line_sdata));
// synopsys translate_off
defparam \line_sdata~I .operation_mode = "input";
// synopsys translate_on
// Location: LC_X6_Y5_N6
maxii_lcell \tmp_cache_line_sdata[0] (
// Equation(s):
// tmp_cache_line_sdata[0] = DFFEAS((((!\line_sdata~combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(\line_sdata~combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(tmp_cache_line_sdata[0]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \tmp_cache_line_sdata[0] .lut_mask = "00ff";
defparam \tmp_cache_line_sdata[0] .operation_mode = "normal";
defparam \tmp_cache_line_sdata[0] .output_mode = "reg_only";
defparam \tmp_cache_line_sdata[0] .register_cascade_mode = "off";
defparam \tmp_cache_line_sdata[0] .sum_lutc_input = "datac";
defparam \tmp_cache_line_sdata[0] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y5_N4
maxii_lcell \tmp_cache_line_sdata[1] (
// Equation(s):
// tmp_cache_line_sdata[1] = DFFEAS(GND, GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , tmp_cache_line_sdata[0], , , VCC)
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(tmp_cache_line_sdata[0]),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(tmp_cache_line_sdata[1]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \tmp_cache_line_sdata[1] .lut_mask = "0000";
defparam \tmp_cache_line_sdata[1] .operation_mode = "normal";
defparam \tmp_cache_line_sdata[1] .output_mode = "reg_only";
defparam \tmp_cache_line_sdata[1] .register_cascade_mode = "off";
defparam \tmp_cache_line_sdata[1] .sum_lutc_input = "datac";
defparam \tmp_cache_line_sdata[1] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y5_N2
maxii_lcell \tmp_cache_line_sdata[2] (
// Equation(s):
// tmp_cache_line_sdata[2] = DFFEAS(GND, GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , tmp_cache_line_sdata[1], , , VCC)
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(tmp_cache_line_sdata[1]),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(tmp_cache_line_sdata[2]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \tmp_cache_line_sdata[2] .lut_mask = "0000";
defparam \tmp_cache_line_sdata[2] .operation_mode = "normal";
defparam \tmp_cache_line_sdata[2] .output_mode = "reg_only";
defparam \tmp_cache_line_sdata[2] .register_cascade_mode = "off";
defparam \tmp_cache_line_sdata[2] .sum_lutc_input = "datac";
defparam \tmp_cache_line_sdata[2] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X6_Y5_N8
maxii_lcell \tmp_cache_line_sdata[3] (
// Equation(s):
// tmp_cache_line_sdata[3] = DFFEAS((((tmp_cache_line_sdata[2]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(tmp_cache_line_sdata[2]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(tmp_cache_line_sdata[3]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \tmp_cache_line_sdata[3] .lut_mask = "ff00";
defparam \tmp_cache_line_sdata[3] .operation_mode = "normal";
defparam \tmp_cache_line_sdata[3] .output_mode = "reg_only";
defparam \tmp_cache_line_sdata[3] .register_cascade_mode = "off";
defparam \tmp_cache_line_sdata[3] .sum_lutc_input = "datac";
defparam \tmp_cache_line_sdata[3] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y5_N5
maxii_lcell \tmp_cache_line_sdata[4] (
// Equation(s):
// tmp_cache_line_sdata[4] = DFFEAS((((tmp_cache_line_sdata[3]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(tmp_cache_line_sdata[3]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(tmp_cache_line_sdata[4]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \tmp_cache_line_sdata[4] .lut_mask = "ff00";
defparam \tmp_cache_line_sdata[4] .operation_mode = "normal";
defparam \tmp_cache_line_sdata[4] .output_mode = "reg_only";
defparam \tmp_cache_line_sdata[4] .register_cascade_mode = "off";
defparam \tmp_cache_line_sdata[4] .sum_lutc_input = "datac";
defparam \tmp_cache_line_sdata[4] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N3
maxii_lcell fiter_line_sdata(
// Equation(s):
// \fiter_line_sdata~regout = DFFEAS((((!tmp_cache_line_sdata[4]))), GLOBAL(\sys_clk~combout ), VCC, , \rst_n~combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(tmp_cache_line_sdata[4]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\rst_n~combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\fiter_line_sdata~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam fiter_line_sdata.lut_mask = "00ff";
defparam fiter_line_sdata.operation_mode = "normal";
defparam fiter_line_sdata.output_mode = "reg_only";
defparam fiter_line_sdata.register_cascade_mode = "off";
defparam fiter_line_sdata.sum_lutc_input = "datac";
defparam fiter_line_sdata.synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N9
maxii_lcell \Decoder0~101 (
// Equation(s):
// \Decoder0~101_combout = (!i[5] & (\recv_complete~0_combout & (!i[0] & \Decoder0~65 )))
.clk(gnd),
.dataa(i[5]),
.datab(\recv_complete~0_combout ),
.datac(i[0]),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~101_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~101 .lut_mask = "0400";
defparam \Decoder0~101 .operation_mode = "normal";
defparam \Decoder0~101 .output_mode = "comb_only";
defparam \Decoder0~101 .register_cascade_mode = "off";
defparam \Decoder0~101 .sum_lutc_input = "datac";
defparam \Decoder0~101 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N0
maxii_lcell \cache_line_sdata[0] (
// Equation(s):
// cache_line_sdata[0] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~101_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~101_combout & ((cache_line_sdata[0]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(\fiter_line_sdata~regout ),
.datac(cache_line_sdata[0]),
.datad(\Decoder0~101_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[0]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[0] .lut_mask = "1150";
defparam \cache_line_sdata[0] .operation_mode = "normal";
defparam \cache_line_sdata[0] .output_mode = "reg_only";
defparam \cache_line_sdata[0] .register_cascade_mode = "off";
defparam \cache_line_sdata[0] .sum_lutc_input = "datac";
defparam \cache_line_sdata[0] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N3
maxii_lcell \recv_complete~10 (
// Equation(s):
// \recv_complete~10_combout = ((!i[0] & ((i[5]))))
.clk(gnd),
.dataa(vcc),
.datab(i[0]),
.datac(vcc),
.datad(i[5]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~10_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~10 .lut_mask = "3300";
defparam \recv_complete~10 .operation_mode = "normal";
defparam \recv_complete~10 .output_mode = "comb_only";
defparam \recv_complete~10 .register_cascade_mode = "off";
defparam \recv_complete~10 .sum_lutc_input = "datac";
defparam \recv_complete~10 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N4
maxii_lcell \recv_complete~11 (
// Equation(s):
// \recv_complete~11_combout = (\negedge_line_sen~regout & (\recv_complete~0_combout & (i[4] & \recv_complete~10_combout )))
.clk(gnd),
.dataa(\negedge_line_sen~regout ),
.datab(\recv_complete~0_combout ),
.datac(i[4]),
.datad(\recv_complete~10_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\recv_complete~11_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \recv_complete~11 .lut_mask = "8000";
defparam \recv_complete~11 .operation_mode = "normal";
defparam \recv_complete~11 .output_mode = "comb_only";
defparam \recv_complete~11 .register_cascade_mode = "off";
defparam \recv_complete~11 .sum_lutc_input = "datac";
defparam \recv_complete~11 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N7
maxii_lcell \cache2_line_sdata[45]~50 (
// Equation(s):
// \cache2_line_sdata[45]~50_combout = (\fault_flag[1][0]~regout ) # ((\fault_flag[0][0]~regout ) # ((\recv_complete~11_combout & \recv_complete~9_combout )))
.clk(gnd),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\recv_complete~11_combout ),
.datad(\recv_complete~9_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\cache2_line_sdata[45]~50_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[45]~50 .lut_mask = "feee";
defparam \cache2_line_sdata[45]~50 .operation_mode = "normal";
defparam \cache2_line_sdata[45]~50 .output_mode = "comb_only";
defparam \cache2_line_sdata[45]~50 .register_cascade_mode = "off";
defparam \cache2_line_sdata[45]~50 .sum_lutc_input = "datac";
defparam \cache2_line_sdata[45]~50 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N8
maxii_lcell \cache2_line_sdata[0] (
// Equation(s):
// cache2_line_sdata[0] = DFFEAS((cache_line_sdata[0] & (((!\fault_flag[1][0]~regout & !\fault_flag[0][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[0]),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[0]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[0] .lut_mask = "000a";
defparam \cache2_line_sdata[0] .operation_mode = "normal";
defparam \cache2_line_sdata[0] .output_mode = "reg_only";
defparam \cache2_line_sdata[0] .register_cascade_mode = "off";
defparam \cache2_line_sdata[0] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[0] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N6
maxii_lcell enable_count_high_voltage_time(
// Equation(s):
// \enable_count_high_voltage_time~regout = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & (\recv_complete~9_combout & \recv_complete~11_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(\recv_complete~9_combout ),
.datad(\recv_complete~11_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\enable_count_high_voltage_time~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam enable_count_high_voltage_time.lut_mask = "1000";
defparam enable_count_high_voltage_time.operation_mode = "normal";
defparam enable_count_high_voltage_time.output_mode = "reg_only";
defparam enable_count_high_voltage_time.register_cascade_mode = "off";
defparam enable_count_high_voltage_time.sum_lutc_input = "datac";
defparam enable_count_high_voltage_time.synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y6_N8
maxii_lcell \cache_enable_count_high_voltage_time[0] (
// Equation(s):
// cache_enable_count_high_voltage_time[0] = DFFEAS((((\enable_count_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(\enable_count_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_enable_count_high_voltage_time[0]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_enable_count_high_voltage_time[0] .lut_mask = "ff00";
defparam \cache_enable_count_high_voltage_time[0] .operation_mode = "normal";
defparam \cache_enable_count_high_voltage_time[0] .output_mode = "reg_only";
defparam \cache_enable_count_high_voltage_time[0] .register_cascade_mode = "off";
defparam \cache_enable_count_high_voltage_time[0] .sum_lutc_input = "datac";
defparam \cache_enable_count_high_voltage_time[0] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y6_N3
maxii_lcell \cache_enable_count_high_voltage_time[1] (
// Equation(s):
// posedge_enable_count_high_voltage_time = (((cache_enable_count_high_voltage_time[1]) # (!cache_enable_count_high_voltage_time[0])))
// cache_enable_count_high_voltage_time[1] = DFFEAS(posedge_enable_count_high_voltage_time, GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , cache_enable_count_high_voltage_time[0], , , VCC)
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(vcc),
.datac(cache_enable_count_high_voltage_time[0]),
.datad(cache_enable_count_high_voltage_time[0]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(vcc),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(posedge_enable_count_high_voltage_time),
.regout(cache_enable_count_high_voltage_time[1]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_enable_count_high_voltage_time[1] .lut_mask = "f0ff";
defparam \cache_enable_count_high_voltage_time[1] .operation_mode = "normal";
defparam \cache_enable_count_high_voltage_time[1] .output_mode = "reg_and_comb";
defparam \cache_enable_count_high_voltage_time[1] .register_cascade_mode = "off";
defparam \cache_enable_count_high_voltage_time[1] .sum_lutc_input = "qfbk";
defparam \cache_enable_count_high_voltage_time[1] .synch_mode = "on";
// synopsys translate_on
// Location: LC_X12_Y5_N4
maxii_lcell \Add2~0 (
// Equation(s):
// \Add2~0_combout = ((!cnt_for_high_voltage_time[0]))
// \Add2~2 = CARRY(((cnt_for_high_voltage_time[0])))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[0]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~0_combout ),
.regout(),
.cout(\Add2~2 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~0 .lut_mask = "33cc";
defparam \Add2~0 .operation_mode = "arithmetic";
defparam \Add2~0 .output_mode = "comb_only";
defparam \Add2~0 .register_cascade_mode = "off";
defparam \Add2~0 .sum_lutc_input = "datac";
defparam \Add2~0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N0
maxii_lcell \cnt_for_high_voltage_time[18]~129 (
// Equation(s):
// \cnt_for_high_voltage_time[18]~129_combout = ((cnt_for_high_voltage_time[0]) # ((\cnt_for_high_voltage_time~128_combout ) # (!\Equal4~9_combout ))) # (!posedge_enable_count_high_voltage_time)
.clk(gnd),
.dataa(posedge_enable_count_high_voltage_time),
.datab(cnt_for_high_voltage_time[0]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Equal4~9_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\cnt_for_high_voltage_time[18]~129_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[18]~129 .lut_mask = "fdff";
defparam \cnt_for_high_voltage_time[18]~129 .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[18]~129 .output_mode = "comb_only";
defparam \cnt_for_high_voltage_time[18]~129 .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[18]~129 .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[18]~129 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N1
maxii_lcell \cnt_for_high_voltage_time[0] (
// Equation(s):
// cnt_for_high_voltage_time[0] = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((\Add2~0_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\Add2~0_combout ),
.datad(posedge_enable_count_high_voltage_time),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[0]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[0] .lut_mask = "1011";
defparam \cnt_for_high_voltage_time[0] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[0] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[0] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[0] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[0] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N5
maxii_lcell \Add2~155 (
// Equation(s):
// \Add2~155_combout = cnt_for_high_voltage_time[1] $ ((((!\Add2~2 ))))
// \Add2~157 = CARRY((!cnt_for_high_voltage_time[1] & ((!\Add2~2 ))))
// \Add2~157COUT1_161 = CARRY((!cnt_for_high_voltage_time[1] & ((!\Add2~2 ))))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[1]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~2 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~155_combout ),
.regout(),
.cout(),
.cout0(\Add2~157 ),
.cout1(\Add2~157COUT1_161 ));
// synopsys translate_off
defparam \Add2~155 .cin_used = "true";
defparam \Add2~155 .lut_mask = "a505";
defparam \Add2~155 .operation_mode = "arithmetic";
defparam \Add2~155 .output_mode = "comb_only";
defparam \Add2~155 .register_cascade_mode = "off";
defparam \Add2~155 .sum_lutc_input = "cin";
defparam \Add2~155 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N3
maxii_lcell \cnt_for_high_voltage_time[1] (
// Equation(s):
// cnt_for_high_voltage_time[1] = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((\Add2~155_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\Add2~155_combout ),
.datad(posedge_enable_count_high_voltage_time),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[1]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[1] .lut_mask = "1011";
defparam \cnt_for_high_voltage_time[1] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[1] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[1] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[1] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[1] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N6
maxii_lcell \Add2~150 (
// Equation(s):
// \Add2~150_combout = cnt_for_high_voltage_time[2] $ (((((!\Add2~2 & \Add2~157 ) # (\Add2~2 & \Add2~157COUT1_161 )))))
// \Add2~152 = CARRY((cnt_for_high_voltage_time[2]) # ((!\Add2~157 )))
// \Add2~152COUT1_162 = CARRY((cnt_for_high_voltage_time[2]) # ((!\Add2~157COUT1_161 )))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[2]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~2 ),
.cin0(\Add2~157 ),
.cin1(\Add2~157COUT1_161 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~150_combout ),
.regout(),
.cout(),
.cout0(\Add2~152 ),
.cout1(\Add2~152COUT1_162 ));
// synopsys translate_off
defparam \Add2~150 .cin0_used = "true";
defparam \Add2~150 .cin1_used = "true";
defparam \Add2~150 .cin_used = "true";
defparam \Add2~150 .lut_mask = "5aaf";
defparam \Add2~150 .operation_mode = "arithmetic";
defparam \Add2~150 .output_mode = "comb_only";
defparam \Add2~150 .register_cascade_mode = "off";
defparam \Add2~150 .sum_lutc_input = "cin";
defparam \Add2~150 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N9
maxii_lcell \cnt_for_high_voltage_time[2] (
// Equation(s):
// cnt_for_high_voltage_time[2] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((\Add2~150_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\Add2~150_combout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(posedge_enable_count_high_voltage_time),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[2]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[2] .lut_mask = "0203";
defparam \cnt_for_high_voltage_time[2] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[2] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[2] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[2] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[2] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N7
maxii_lcell \Add2~145 (
// Equation(s):
// \Add2~145_combout = (cnt_for_high_voltage_time[3] $ ((!(!\Add2~2 & \Add2~152 ) # (\Add2~2 & \Add2~152COUT1_162 ))))
// \Add2~147 = CARRY(((!cnt_for_high_voltage_time[3] & !\Add2~152 )))
// \Add2~147COUT1_163 = CARRY(((!cnt_for_high_voltage_time[3] & !\Add2~152COUT1_162 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[3]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~2 ),
.cin0(\Add2~152 ),
.cin1(\Add2~152COUT1_162 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~145_combout ),
.regout(),
.cout(),
.cout0(\Add2~147 ),
.cout1(\Add2~147COUT1_163 ));
// synopsys translate_off
defparam \Add2~145 .cin0_used = "true";
defparam \Add2~145 .cin1_used = "true";
defparam \Add2~145 .cin_used = "true";
defparam \Add2~145 .lut_mask = "c303";
defparam \Add2~145 .operation_mode = "arithmetic";
defparam \Add2~145 .output_mode = "comb_only";
defparam \Add2~145 .register_cascade_mode = "off";
defparam \Add2~145 .sum_lutc_input = "cin";
defparam \Add2~145 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N4
maxii_lcell \cnt_for_high_voltage_time[3] (
// Equation(s):
// cnt_for_high_voltage_time[3] = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((\Add2~145_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\Add2~145_combout ),
.datab(\fault_flag[1][0]~regout ),
.datac(posedge_enable_count_high_voltage_time),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[3]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[3] .lut_mask = "0023";
defparam \cnt_for_high_voltage_time[3] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[3] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[3] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[3] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[3] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N8
maxii_lcell \Add2~140 (
// Equation(s):
// \Add2~140_combout = (cnt_for_high_voltage_time[4] $ (((!\Add2~2 & \Add2~147 ) # (\Add2~2 & \Add2~147COUT1_163 ))))
// \Add2~142 = CARRY(((cnt_for_high_voltage_time[4]) # (!\Add2~147 )))
// \Add2~142COUT1_164 = CARRY(((cnt_for_high_voltage_time[4]) # (!\Add2~147COUT1_163 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[4]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~2 ),
.cin0(\Add2~147 ),
.cin1(\Add2~147COUT1_163 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~140_combout ),
.regout(),
.cout(),
.cout0(\Add2~142 ),
.cout1(\Add2~142COUT1_164 ));
// synopsys translate_off
defparam \Add2~140 .cin0_used = "true";
defparam \Add2~140 .cin1_used = "true";
defparam \Add2~140 .cin_used = "true";
defparam \Add2~140 .lut_mask = "3ccf";
defparam \Add2~140 .operation_mode = "arithmetic";
defparam \Add2~140 .output_mode = "comb_only";
defparam \Add2~140 .register_cascade_mode = "off";
defparam \Add2~140 .sum_lutc_input = "cin";
defparam \Add2~140 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N7
maxii_lcell \cnt_for_high_voltage_time[4] (
// Equation(s):
// cnt_for_high_voltage_time[4] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((\Add2~140_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\Add2~140_combout ),
.datab(\fault_flag[0][0]~regout ),
.datac(posedge_enable_count_high_voltage_time),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[4]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[4] .lut_mask = "0023";
defparam \cnt_for_high_voltage_time[4] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[4] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[4] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[4] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[4] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N9
maxii_lcell \Add2~135 (
// Equation(s):
// \Add2~135_combout = (cnt_for_high_voltage_time[5] $ ((!(!\Add2~2 & \Add2~142 ) # (\Add2~2 & \Add2~142COUT1_164 ))))
// \Add2~137 = CARRY(((!cnt_for_high_voltage_time[5] & !\Add2~142COUT1_164 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[5]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~2 ),
.cin0(\Add2~142 ),
.cin1(\Add2~142COUT1_164 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~135_combout ),
.regout(),
.cout(\Add2~137 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~135 .cin0_used = "true";
defparam \Add2~135 .cin1_used = "true";
defparam \Add2~135 .cin_used = "true";
defparam \Add2~135 .lut_mask = "c303";
defparam \Add2~135 .operation_mode = "arithmetic";
defparam \Add2~135 .output_mode = "comb_only";
defparam \Add2~135 .register_cascade_mode = "off";
defparam \Add2~135 .sum_lutc_input = "cin";
defparam \Add2~135 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N6
maxii_lcell \cnt_for_high_voltage_time[5] (
// Equation(s):
// cnt_for_high_voltage_time[5] = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((\Add2~135_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(posedge_enable_count_high_voltage_time),
.datad(\Add2~135_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[5]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[5] .lut_mask = "1101";
defparam \cnt_for_high_voltage_time[5] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[5] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[5] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[5] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[5] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N0
maxii_lcell \Add2~130 (
// Equation(s):
// \Add2~130_combout = (cnt_for_high_voltage_time[6] $ ((\Add2~137 )))
// \Add2~132 = CARRY(((cnt_for_high_voltage_time[6]) # (!\Add2~137 )))
// \Add2~132COUT1_165 = CARRY(((cnt_for_high_voltage_time[6]) # (!\Add2~137 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[6]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~137 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~130_combout ),
.regout(),
.cout(),
.cout0(\Add2~132 ),
.cout1(\Add2~132COUT1_165 ));
// synopsys translate_off
defparam \Add2~130 .cin_used = "true";
defparam \Add2~130 .lut_mask = "3ccf";
defparam \Add2~130 .operation_mode = "arithmetic";
defparam \Add2~130 .output_mode = "comb_only";
defparam \Add2~130 .register_cascade_mode = "off";
defparam \Add2~130 .sum_lutc_input = "cin";
defparam \Add2~130 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N2
maxii_lcell \cnt_for_high_voltage_time[6] (
// Equation(s):
// cnt_for_high_voltage_time[6] = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & (\Add2~130_combout & posedge_enable_count_high_voltage_time))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\Add2~130_combout ),
.datad(posedge_enable_count_high_voltage_time),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[6]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[6] .lut_mask = "1000";
defparam \cnt_for_high_voltage_time[6] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[6] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[6] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[6] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[6] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N1
maxii_lcell \Add2~125 (
// Equation(s):
// \Add2~125_combout = cnt_for_high_voltage_time[7] $ ((((!(!\Add2~137 & \Add2~132 ) # (\Add2~137 & \Add2~132COUT1_165 )))))
// \Add2~127 = CARRY((!cnt_for_high_voltage_time[7] & ((!\Add2~132 ))))
// \Add2~127COUT1_166 = CARRY((!cnt_for_high_voltage_time[7] & ((!\Add2~132COUT1_165 ))))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[7]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~137 ),
.cin0(\Add2~132 ),
.cin1(\Add2~132COUT1_165 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~125_combout ),
.regout(),
.cout(),
.cout0(\Add2~127 ),
.cout1(\Add2~127COUT1_166 ));
// synopsys translate_off
defparam \Add2~125 .cin0_used = "true";
defparam \Add2~125 .cin1_used = "true";
defparam \Add2~125 .cin_used = "true";
defparam \Add2~125 .lut_mask = "a505";
defparam \Add2~125 .operation_mode = "arithmetic";
defparam \Add2~125 .output_mode = "comb_only";
defparam \Add2~125 .register_cascade_mode = "off";
defparam \Add2~125 .sum_lutc_input = "cin";
defparam \Add2~125 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y5_N0
maxii_lcell \cnt_for_high_voltage_time[7] (
// Equation(s):
// cnt_for_high_voltage_time[7] = DFFEAS((!\fault_flag[1][0]~regout & (posedge_enable_count_high_voltage_time & (!\fault_flag[0][0]~regout & \Add2~125_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~125_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[7]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[7] .lut_mask = "0400";
defparam \cnt_for_high_voltage_time[7] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[7] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[7] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[7] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[7] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N2
maxii_lcell \Add2~120 (
// Equation(s):
// \Add2~120_combout = (cnt_for_high_voltage_time[8] $ (((!\Add2~137 & \Add2~127 ) # (\Add2~137 & \Add2~127COUT1_166 ))))
// \Add2~122 = CARRY(((cnt_for_high_voltage_time[8]) # (!\Add2~127 )))
// \Add2~122COUT1_167 = CARRY(((cnt_for_high_voltage_time[8]) # (!\Add2~127COUT1_166 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[8]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~137 ),
.cin0(\Add2~127 ),
.cin1(\Add2~127COUT1_166 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~120_combout ),
.regout(),
.cout(),
.cout0(\Add2~122 ),
.cout1(\Add2~122COUT1_167 ));
// synopsys translate_off
defparam \Add2~120 .cin0_used = "true";
defparam \Add2~120 .cin1_used = "true";
defparam \Add2~120 .cin_used = "true";
defparam \Add2~120 .lut_mask = "3ccf";
defparam \Add2~120 .operation_mode = "arithmetic";
defparam \Add2~120 .output_mode = "comb_only";
defparam \Add2~120 .register_cascade_mode = "off";
defparam \Add2~120 .sum_lutc_input = "cin";
defparam \Add2~120 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N6
maxii_lcell \cnt_for_high_voltage_time[8] (
// Equation(s):
// cnt_for_high_voltage_time[8] = DFFEAS((!\fault_flag[0][0]~regout & (posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & \Add2~120_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\fault_flag[1][0]~regout ),
.datad(\Add2~120_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[8]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[8] .lut_mask = "0400";
defparam \cnt_for_high_voltage_time[8] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[8] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[8] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[8] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[8] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N3
maxii_lcell \Add2~115 (
// Equation(s):
// \Add2~115_combout = (cnt_for_high_voltage_time[9] $ ((!(!\Add2~137 & \Add2~122 ) # (\Add2~137 & \Add2~122COUT1_167 ))))
// \Add2~117 = CARRY(((!cnt_for_high_voltage_time[9] & !\Add2~122 )))
// \Add2~117COUT1_168 = CARRY(((!cnt_for_high_voltage_time[9] & !\Add2~122COUT1_167 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[9]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~137 ),
.cin0(\Add2~122 ),
.cin1(\Add2~122COUT1_167 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~115_combout ),
.regout(),
.cout(),
.cout0(\Add2~117 ),
.cout1(\Add2~117COUT1_168 ));
// synopsys translate_off
defparam \Add2~115 .cin0_used = "true";
defparam \Add2~115 .cin1_used = "true";
defparam \Add2~115 .cin_used = "true";
defparam \Add2~115 .lut_mask = "c303";
defparam \Add2~115 .operation_mode = "arithmetic";
defparam \Add2~115 .output_mode = "comb_only";
defparam \Add2~115 .register_cascade_mode = "off";
defparam \Add2~115 .sum_lutc_input = "cin";
defparam \Add2~115 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N2
maxii_lcell \cnt_for_high_voltage_time[9] (
// Equation(s):
// cnt_for_high_voltage_time[9] = DFFEAS((!\fault_flag[0][0]~regout & (posedge_enable_count_high_voltage_time & (\Add2~115_combout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\Add2~115_combout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[9]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[9] .lut_mask = "0040";
defparam \cnt_for_high_voltage_time[9] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[9] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[9] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[9] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[9] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N4
maxii_lcell \Add2~110 (
// Equation(s):
// \Add2~110_combout = (cnt_for_high_voltage_time[10] $ (((!\Add2~137 & \Add2~117 ) # (\Add2~137 & \Add2~117COUT1_168 ))))
// \Add2~112 = CARRY(((cnt_for_high_voltage_time[10]) # (!\Add2~117COUT1_168 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[10]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~137 ),
.cin0(\Add2~117 ),
.cin1(\Add2~117COUT1_168 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~110_combout ),
.regout(),
.cout(\Add2~112 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~110 .cin0_used = "true";
defparam \Add2~110 .cin1_used = "true";
defparam \Add2~110 .cin_used = "true";
defparam \Add2~110 .lut_mask = "3ccf";
defparam \Add2~110 .operation_mode = "arithmetic";
defparam \Add2~110 .output_mode = "comb_only";
defparam \Add2~110 .register_cascade_mode = "off";
defparam \Add2~110 .sum_lutc_input = "cin";
defparam \Add2~110 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N8
maxii_lcell \cnt_for_high_voltage_time[10] (
// Equation(s):
// cnt_for_high_voltage_time[10] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((\Add2~110_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\Add2~110_combout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[10]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[10] .lut_mask = "0051";
defparam \cnt_for_high_voltage_time[10] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[10] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[10] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[10] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[10] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N5
maxii_lcell \Add2~105 (
// Equation(s):
// \Add2~105_combout = (cnt_for_high_voltage_time[11] $ ((!\Add2~112 )))
// \Add2~107 = CARRY(((!cnt_for_high_voltage_time[11] & !\Add2~112 )))
// \Add2~107COUT1_169 = CARRY(((!cnt_for_high_voltage_time[11] & !\Add2~112 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[11]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~112 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~105_combout ),
.regout(),
.cout(),
.cout0(\Add2~107 ),
.cout1(\Add2~107COUT1_169 ));
// synopsys translate_off
defparam \Add2~105 .cin_used = "true";
defparam \Add2~105 .lut_mask = "c303";
defparam \Add2~105 .operation_mode = "arithmetic";
defparam \Add2~105 .output_mode = "comb_only";
defparam \Add2~105 .register_cascade_mode = "off";
defparam \Add2~105 .sum_lutc_input = "cin";
defparam \Add2~105 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N7
maxii_lcell \cnt_for_high_voltage_time[11] (
// Equation(s):
// cnt_for_high_voltage_time[11] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((\Add2~105_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\fault_flag[1][0]~regout ),
.datad(\Add2~105_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[11]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[11] .lut_mask = "0501";
defparam \cnt_for_high_voltage_time[11] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[11] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[11] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[11] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[11] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N9
maxii_lcell \Equal4~6 (
// Equation(s):
// \Equal4~6_combout = (!cnt_for_high_voltage_time[10] & (!cnt_for_high_voltage_time[11] & (!cnt_for_high_voltage_time[8] & !cnt_for_high_voltage_time[9])))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[10]),
.datab(cnt_for_high_voltage_time[11]),
.datac(cnt_for_high_voltage_time[8]),
.datad(cnt_for_high_voltage_time[9]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~6_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~6 .lut_mask = "0001";
defparam \Equal4~6 .operation_mode = "normal";
defparam \Equal4~6 .output_mode = "comb_only";
defparam \Equal4~6 .register_cascade_mode = "off";
defparam \Equal4~6 .sum_lutc_input = "datac";
defparam \Equal4~6 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N6
maxii_lcell \Add2~100 (
// Equation(s):
// \Add2~100_combout = (cnt_for_high_voltage_time[12] $ (((!\Add2~112 & \Add2~107 ) # (\Add2~112 & \Add2~107COUT1_169 ))))
// \Add2~102 = CARRY(((cnt_for_high_voltage_time[12]) # (!\Add2~107 )))
// \Add2~102COUT1_170 = CARRY(((cnt_for_high_voltage_time[12]) # (!\Add2~107COUT1_169 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[12]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~112 ),
.cin0(\Add2~107 ),
.cin1(\Add2~107COUT1_169 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~100_combout ),
.regout(),
.cout(),
.cout0(\Add2~102 ),
.cout1(\Add2~102COUT1_170 ));
// synopsys translate_off
defparam \Add2~100 .cin0_used = "true";
defparam \Add2~100 .cin1_used = "true";
defparam \Add2~100 .cin_used = "true";
defparam \Add2~100 .lut_mask = "3ccf";
defparam \Add2~100 .operation_mode = "arithmetic";
defparam \Add2~100 .output_mode = "comb_only";
defparam \Add2~100 .register_cascade_mode = "off";
defparam \Add2~100 .sum_lutc_input = "cin";
defparam \Add2~100 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y6_N2
maxii_lcell \cnt_for_high_voltage_time[12] (
// Equation(s):
// cnt_for_high_voltage_time[12] = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((\Add2~100_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~100_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[12]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[12] .lut_mask = "0301";
defparam \cnt_for_high_voltage_time[12] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[12] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[12] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[12] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[12] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N7
maxii_lcell \Add2~95 (
// Equation(s):
// \Add2~95_combout = cnt_for_high_voltage_time[13] $ ((((!(!\Add2~112 & \Add2~102 ) # (\Add2~112 & \Add2~102COUT1_170 )))))
// \Add2~97 = CARRY((!cnt_for_high_voltage_time[13] & ((!\Add2~102 ))))
// \Add2~97COUT1_171 = CARRY((!cnt_for_high_voltage_time[13] & ((!\Add2~102COUT1_170 ))))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[13]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~112 ),
.cin0(\Add2~102 ),
.cin1(\Add2~102COUT1_170 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~95_combout ),
.regout(),
.cout(),
.cout0(\Add2~97 ),
.cout1(\Add2~97COUT1_171 ));
// synopsys translate_off
defparam \Add2~95 .cin0_used = "true";
defparam \Add2~95 .cin1_used = "true";
defparam \Add2~95 .cin_used = "true";
defparam \Add2~95 .lut_mask = "a505";
defparam \Add2~95 .operation_mode = "arithmetic";
defparam \Add2~95 .output_mode = "comb_only";
defparam \Add2~95 .register_cascade_mode = "off";
defparam \Add2~95 .sum_lutc_input = "cin";
defparam \Add2~95 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y6_N1
maxii_lcell \cnt_for_high_voltage_time[13] (
// Equation(s):
// cnt_for_high_voltage_time[13] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & (\Add2~95_combout & posedge_enable_count_high_voltage_time))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(\Add2~95_combout ),
.datad(posedge_enable_count_high_voltage_time),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[13]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[13] .lut_mask = "1000";
defparam \cnt_for_high_voltage_time[13] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[13] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[13] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[13] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[13] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N8
maxii_lcell \Add2~90 (
// Equation(s):
// \Add2~90_combout = cnt_for_high_voltage_time[14] $ (((((!\Add2~112 & \Add2~97 ) # (\Add2~112 & \Add2~97COUT1_171 )))))
// \Add2~92 = CARRY((cnt_for_high_voltage_time[14]) # ((!\Add2~97 )))
// \Add2~92COUT1_172 = CARRY((cnt_for_high_voltage_time[14]) # ((!\Add2~97COUT1_171 )))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[14]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~112 ),
.cin0(\Add2~97 ),
.cin1(\Add2~97COUT1_171 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~90_combout ),
.regout(),
.cout(),
.cout0(\Add2~92 ),
.cout1(\Add2~92COUT1_172 ));
// synopsys translate_off
defparam \Add2~90 .cin0_used = "true";
defparam \Add2~90 .cin1_used = "true";
defparam \Add2~90 .cin_used = "true";
defparam \Add2~90 .lut_mask = "5aaf";
defparam \Add2~90 .operation_mode = "arithmetic";
defparam \Add2~90 .output_mode = "comb_only";
defparam \Add2~90 .register_cascade_mode = "off";
defparam \Add2~90 .sum_lutc_input = "cin";
defparam \Add2~90 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y6_N7
maxii_lcell \cnt_for_high_voltage_time[14] (
// Equation(s):
// cnt_for_high_voltage_time[14] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~90_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~90_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[14]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[14] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[14] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[14] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[14] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[14] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[14] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y5_N9
maxii_lcell \Add2~85 (
// Equation(s):
// \Add2~85_combout = (cnt_for_high_voltage_time[15] $ ((!(!\Add2~112 & \Add2~92 ) # (\Add2~112 & \Add2~92COUT1_172 ))))
// \Add2~87 = CARRY(((!cnt_for_high_voltage_time[15] & !\Add2~92COUT1_172 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[15]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~112 ),
.cin0(\Add2~92 ),
.cin1(\Add2~92COUT1_172 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~85_combout ),
.regout(),
.cout(\Add2~87 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~85 .cin0_used = "true";
defparam \Add2~85 .cin1_used = "true";
defparam \Add2~85 .cin_used = "true";
defparam \Add2~85 .lut_mask = "c303";
defparam \Add2~85 .operation_mode = "arithmetic";
defparam \Add2~85 .output_mode = "comb_only";
defparam \Add2~85 .register_cascade_mode = "off";
defparam \Add2~85 .sum_lutc_input = "cin";
defparam \Add2~85 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y6_N5
maxii_lcell \cnt_for_high_voltage_time[15] (
// Equation(s):
// cnt_for_high_voltage_time[15] = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((\Add2~85_combout ) # (!posedge_enable_count_high_voltage_time)))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~85_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[15]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[15] .lut_mask = "0301";
defparam \cnt_for_high_voltage_time[15] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[15] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[15] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[15] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[15] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y6_N9
maxii_lcell \Equal4~5 (
// Equation(s):
// \Equal4~5_combout = (!cnt_for_high_voltage_time[15] & (!cnt_for_high_voltage_time[13] & (!cnt_for_high_voltage_time[14] & !cnt_for_high_voltage_time[12])))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[15]),
.datab(cnt_for_high_voltage_time[13]),
.datac(cnt_for_high_voltage_time[14]),
.datad(cnt_for_high_voltage_time[12]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~5_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~5 .lut_mask = "0001";
defparam \Equal4~5 .operation_mode = "normal";
defparam \Equal4~5 .output_mode = "comb_only";
defparam \Equal4~5 .register_cascade_mode = "off";
defparam \Equal4~5 .sum_lutc_input = "datac";
defparam \Equal4~5 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N3
maxii_lcell \Equal4~7 (
// Equation(s):
// \Equal4~7_combout = (!cnt_for_high_voltage_time[7] & (!cnt_for_high_voltage_time[4] & (!cnt_for_high_voltage_time[6] & !cnt_for_high_voltage_time[5])))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[7]),
.datab(cnt_for_high_voltage_time[4]),
.datac(cnt_for_high_voltage_time[6]),
.datad(cnt_for_high_voltage_time[5]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~7_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~7 .lut_mask = "0001";
defparam \Equal4~7 .operation_mode = "normal";
defparam \Equal4~7 .output_mode = "comb_only";
defparam \Equal4~7 .register_cascade_mode = "off";
defparam \Equal4~7 .sum_lutc_input = "datac";
defparam \Equal4~7 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N5
maxii_lcell \Equal4~8 (
// Equation(s):
// \Equal4~8_combout = (!cnt_for_high_voltage_time[3] & (!cnt_for_high_voltage_time[2] & (!cnt_for_high_voltage_time[1] & \Equal4~7_combout )))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[3]),
.datab(cnt_for_high_voltage_time[2]),
.datac(cnt_for_high_voltage_time[1]),
.datad(\Equal4~7_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~8_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~8 .lut_mask = "0100";
defparam \Equal4~8 .operation_mode = "normal";
defparam \Equal4~8 .output_mode = "comb_only";
defparam \Equal4~8 .register_cascade_mode = "off";
defparam \Equal4~8 .sum_lutc_input = "datac";
defparam \Equal4~8 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N0
maxii_lcell \Add2~80 (
// Equation(s):
// \Add2~80_combout = (cnt_for_high_voltage_time[16] $ ((\Add2~87 )))
// \Add2~82 = CARRY(((cnt_for_high_voltage_time[16]) # (!\Add2~87 )))
// \Add2~82COUT1_173 = CARRY(((cnt_for_high_voltage_time[16]) # (!\Add2~87 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[16]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~87 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~80_combout ),
.regout(),
.cout(),
.cout0(\Add2~82 ),
.cout1(\Add2~82COUT1_173 ));
// synopsys translate_off
defparam \Add2~80 .cin_used = "true";
defparam \Add2~80 .lut_mask = "3ccf";
defparam \Add2~80 .operation_mode = "arithmetic";
defparam \Add2~80 .output_mode = "comb_only";
defparam \Add2~80 .register_cascade_mode = "off";
defparam \Add2~80 .sum_lutc_input = "cin";
defparam \Add2~80 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N5
maxii_lcell \cnt_for_high_voltage_time[16] (
// Equation(s):
// cnt_for_high_voltage_time[16] = DFFEAS((!\fault_flag[0][0]~regout & (posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & \Add2~80_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\fault_flag[1][0]~regout ),
.datad(\Add2~80_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[16]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[16] .lut_mask = "0400";
defparam \cnt_for_high_voltage_time[16] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[16] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[16] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[16] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[16] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N1
maxii_lcell \Add2~75 (
// Equation(s):
// \Add2~75_combout = (cnt_for_high_voltage_time[17] $ ((!(!\Add2~87 & \Add2~82 ) # (\Add2~87 & \Add2~82COUT1_173 ))))
// \Add2~77 = CARRY(((!cnt_for_high_voltage_time[17] & !\Add2~82 )))
// \Add2~77COUT1_174 = CARRY(((!cnt_for_high_voltage_time[17] & !\Add2~82COUT1_173 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[17]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~87 ),
.cin0(\Add2~82 ),
.cin1(\Add2~82COUT1_173 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~75_combout ),
.regout(),
.cout(),
.cout0(\Add2~77 ),
.cout1(\Add2~77COUT1_174 ));
// synopsys translate_off
defparam \Add2~75 .cin0_used = "true";
defparam \Add2~75 .cin1_used = "true";
defparam \Add2~75 .cin_used = "true";
defparam \Add2~75 .lut_mask = "c303";
defparam \Add2~75 .operation_mode = "arithmetic";
defparam \Add2~75 .output_mode = "comb_only";
defparam \Add2~75 .register_cascade_mode = "off";
defparam \Add2~75 .sum_lutc_input = "cin";
defparam \Add2~75 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N4
maxii_lcell \cnt_for_high_voltage_time[17] (
// Equation(s):
// cnt_for_high_voltage_time[17] = DFFEAS((!\fault_flag[0][0]~regout & (posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & \Add2~75_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\fault_flag[1][0]~regout ),
.datad(\Add2~75_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[17]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[17] .lut_mask = "0400";
defparam \cnt_for_high_voltage_time[17] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[17] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[17] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[17] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[17] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N2
maxii_lcell \Add2~70 (
// Equation(s):
// \Add2~70_combout = (cnt_for_high_voltage_time[18] $ (((!\Add2~87 & \Add2~77 ) # (\Add2~87 & \Add2~77COUT1_174 ))))
// \Add2~72 = CARRY(((cnt_for_high_voltage_time[18]) # (!\Add2~77 )))
// \Add2~72COUT1_175 = CARRY(((cnt_for_high_voltage_time[18]) # (!\Add2~77COUT1_174 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[18]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~87 ),
.cin0(\Add2~77 ),
.cin1(\Add2~77COUT1_174 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~70_combout ),
.regout(),
.cout(),
.cout0(\Add2~72 ),
.cout1(\Add2~72COUT1_175 ));
// synopsys translate_off
defparam \Add2~70 .cin0_used = "true";
defparam \Add2~70 .cin1_used = "true";
defparam \Add2~70 .cin_used = "true";
defparam \Add2~70 .lut_mask = "3ccf";
defparam \Add2~70 .operation_mode = "arithmetic";
defparam \Add2~70 .output_mode = "comb_only";
defparam \Add2~70 .register_cascade_mode = "off";
defparam \Add2~70 .sum_lutc_input = "cin";
defparam \Add2~70 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N3
maxii_lcell \cnt_for_high_voltage_time[18] (
// Equation(s):
// cnt_for_high_voltage_time[18] = DFFEAS((!\fault_flag[0][0]~regout & (posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & \Add2~70_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\fault_flag[1][0]~regout ),
.datad(\Add2~70_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[18]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[18] .lut_mask = "0400";
defparam \cnt_for_high_voltage_time[18] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[18] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[18] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[18] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[18] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N3
maxii_lcell \Add2~65 (
// Equation(s):
// \Add2~65_combout = cnt_for_high_voltage_time[19] $ ((((!(!\Add2~87 & \Add2~72 ) # (\Add2~87 & \Add2~72COUT1_175 )))))
// \Add2~67 = CARRY((!cnt_for_high_voltage_time[19] & ((!\Add2~72 ))))
// \Add2~67COUT1_176 = CARRY((!cnt_for_high_voltage_time[19] & ((!\Add2~72COUT1_175 ))))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[19]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~87 ),
.cin0(\Add2~72 ),
.cin1(\Add2~72COUT1_175 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~65_combout ),
.regout(),
.cout(),
.cout0(\Add2~67 ),
.cout1(\Add2~67COUT1_176 ));
// synopsys translate_off
defparam \Add2~65 .cin0_used = "true";
defparam \Add2~65 .cin1_used = "true";
defparam \Add2~65 .cin_used = "true";
defparam \Add2~65 .lut_mask = "a505";
defparam \Add2~65 .operation_mode = "arithmetic";
defparam \Add2~65 .output_mode = "comb_only";
defparam \Add2~65 .register_cascade_mode = "off";
defparam \Add2~65 .sum_lutc_input = "cin";
defparam \Add2~65 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N1
maxii_lcell \cnt_for_high_voltage_time[19] (
// Equation(s):
// cnt_for_high_voltage_time[19] = DFFEAS((!\fault_flag[0][0]~regout & (posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & \Add2~65_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(posedge_enable_count_high_voltage_time),
.datac(\fault_flag[1][0]~regout ),
.datad(\Add2~65_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[19]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[19] .lut_mask = "0400";
defparam \cnt_for_high_voltage_time[19] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[19] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[19] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[19] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[19] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y5_N0
maxii_lcell \Equal4~3 (
// Equation(s):
// \Equal4~3_combout = (!cnt_for_high_voltage_time[16] & (!cnt_for_high_voltage_time[19] & (!cnt_for_high_voltage_time[17] & !cnt_for_high_voltage_time[18])))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[16]),
.datab(cnt_for_high_voltage_time[19]),
.datac(cnt_for_high_voltage_time[17]),
.datad(cnt_for_high_voltage_time[18]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~3_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~3 .lut_mask = "0001";
defparam \Equal4~3 .operation_mode = "normal";
defparam \Equal4~3 .output_mode = "comb_only";
defparam \Equal4~3 .register_cascade_mode = "off";
defparam \Equal4~3 .sum_lutc_input = "datac";
defparam \Equal4~3 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N4
maxii_lcell \Add2~60 (
// Equation(s):
// \Add2~60_combout = (cnt_for_high_voltage_time[20] $ (((!\Add2~87 & \Add2~67 ) # (\Add2~87 & \Add2~67COUT1_176 ))))
// \Add2~62 = CARRY(((cnt_for_high_voltage_time[20]) # (!\Add2~67COUT1_176 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[20]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~87 ),
.cin0(\Add2~67 ),
.cin1(\Add2~67COUT1_176 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~60_combout ),
.regout(),
.cout(\Add2~62 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~60 .cin0_used = "true";
defparam \Add2~60 .cin1_used = "true";
defparam \Add2~60 .cin_used = "true";
defparam \Add2~60 .lut_mask = "3ccf";
defparam \Add2~60 .operation_mode = "arithmetic";
defparam \Add2~60 .output_mode = "comb_only";
defparam \Add2~60 .register_cascade_mode = "off";
defparam \Add2~60 .sum_lutc_input = "cin";
defparam \Add2~60 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N9
maxii_lcell \cnt_for_high_voltage_time[20] (
// Equation(s):
// cnt_for_high_voltage_time[20] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~60_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~60_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[20]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[20] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[20] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[20] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[20] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[20] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[20] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N5
maxii_lcell \Add2~55 (
// Equation(s):
// \Add2~55_combout = cnt_for_high_voltage_time[21] $ ((((!\Add2~62 ))))
// \Add2~57 = CARRY((!cnt_for_high_voltage_time[21] & ((!\Add2~62 ))))
// \Add2~57COUT1_177 = CARRY((!cnt_for_high_voltage_time[21] & ((!\Add2~62 ))))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[21]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~62 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~55_combout ),
.regout(),
.cout(),
.cout0(\Add2~57 ),
.cout1(\Add2~57COUT1_177 ));
// synopsys translate_off
defparam \Add2~55 .cin_used = "true";
defparam \Add2~55 .lut_mask = "a505";
defparam \Add2~55 .operation_mode = "arithmetic";
defparam \Add2~55 .output_mode = "comb_only";
defparam \Add2~55 .register_cascade_mode = "off";
defparam \Add2~55 .sum_lutc_input = "cin";
defparam \Add2~55 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N0
maxii_lcell \cnt_for_high_voltage_time[21] (
// Equation(s):
// cnt_for_high_voltage_time[21] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~55_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~55_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[21]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[21] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[21] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[21] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[21] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[21] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[21] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N6
maxii_lcell \Add2~50 (
// Equation(s):
// \Add2~50_combout = (cnt_for_high_voltage_time[22] $ (((!\Add2~62 & \Add2~57 ) # (\Add2~62 & \Add2~57COUT1_177 ))))
// \Add2~52 = CARRY(((cnt_for_high_voltage_time[22]) # (!\Add2~57 )))
// \Add2~52COUT1_178 = CARRY(((cnt_for_high_voltage_time[22]) # (!\Add2~57COUT1_177 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[22]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~62 ),
.cin0(\Add2~57 ),
.cin1(\Add2~57COUT1_177 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~50_combout ),
.regout(),
.cout(),
.cout0(\Add2~52 ),
.cout1(\Add2~52COUT1_178 ));
// synopsys translate_off
defparam \Add2~50 .cin0_used = "true";
defparam \Add2~50 .cin1_used = "true";
defparam \Add2~50 .cin_used = "true";
defparam \Add2~50 .lut_mask = "3ccf";
defparam \Add2~50 .operation_mode = "arithmetic";
defparam \Add2~50 .output_mode = "comb_only";
defparam \Add2~50 .register_cascade_mode = "off";
defparam \Add2~50 .sum_lutc_input = "cin";
defparam \Add2~50 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N3
maxii_lcell \cnt_for_high_voltage_time[22] (
// Equation(s):
// cnt_for_high_voltage_time[22] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~50_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~50_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[22]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[22] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[22] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[22] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[22] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[22] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[22] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N7
maxii_lcell \Add2~45 (
// Equation(s):
// \Add2~45_combout = (cnt_for_high_voltage_time[23] $ ((!(!\Add2~62 & \Add2~52 ) # (\Add2~62 & \Add2~52COUT1_178 ))))
// \Add2~47 = CARRY(((!cnt_for_high_voltage_time[23] & !\Add2~52 )))
// \Add2~47COUT1_179 = CARRY(((!cnt_for_high_voltage_time[23] & !\Add2~52COUT1_178 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[23]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~62 ),
.cin0(\Add2~52 ),
.cin1(\Add2~52COUT1_178 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~45_combout ),
.regout(),
.cout(),
.cout0(\Add2~47 ),
.cout1(\Add2~47COUT1_179 ));
// synopsys translate_off
defparam \Add2~45 .cin0_used = "true";
defparam \Add2~45 .cin1_used = "true";
defparam \Add2~45 .cin_used = "true";
defparam \Add2~45 .lut_mask = "c303";
defparam \Add2~45 .operation_mode = "arithmetic";
defparam \Add2~45 .output_mode = "comb_only";
defparam \Add2~45 .register_cascade_mode = "off";
defparam \Add2~45 .sum_lutc_input = "cin";
defparam \Add2~45 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N5
maxii_lcell \cnt_for_high_voltage_time[23] (
// Equation(s):
// cnt_for_high_voltage_time[23] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (\Add2~45_combout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\Add2~45_combout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[23]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[23] .lut_mask = "0020";
defparam \cnt_for_high_voltage_time[23] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[23] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[23] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[23] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[23] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N8
maxii_lcell \Add2~40 (
// Equation(s):
// \Add2~40_combout = (cnt_for_high_voltage_time[24] $ (((!\Add2~62 & \Add2~47 ) # (\Add2~62 & \Add2~47COUT1_179 ))))
// \Add2~42 = CARRY(((cnt_for_high_voltage_time[24]) # (!\Add2~47 )))
// \Add2~42COUT1_180 = CARRY(((cnt_for_high_voltage_time[24]) # (!\Add2~47COUT1_179 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[24]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~62 ),
.cin0(\Add2~47 ),
.cin1(\Add2~47COUT1_179 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~40_combout ),
.regout(),
.cout(),
.cout0(\Add2~42 ),
.cout1(\Add2~42COUT1_180 ));
// synopsys translate_off
defparam \Add2~40 .cin0_used = "true";
defparam \Add2~40 .cin1_used = "true";
defparam \Add2~40 .cin_used = "true";
defparam \Add2~40 .lut_mask = "3ccf";
defparam \Add2~40 .operation_mode = "arithmetic";
defparam \Add2~40 .output_mode = "comb_only";
defparam \Add2~40 .register_cascade_mode = "off";
defparam \Add2~40 .sum_lutc_input = "cin";
defparam \Add2~40 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N8
maxii_lcell \cnt_for_high_voltage_time[24] (
// Equation(s):
// cnt_for_high_voltage_time[24] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~40_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~40_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[24]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[24] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[24] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[24] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[24] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[24] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[24] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X14_Y5_N9
maxii_lcell \Add2~35 (
// Equation(s):
// \Add2~35_combout = (cnt_for_high_voltage_time[25] $ ((!(!\Add2~62 & \Add2~42 ) # (\Add2~62 & \Add2~42COUT1_180 ))))
// \Add2~37 = CARRY(((!cnt_for_high_voltage_time[25] & !\Add2~42COUT1_180 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[25]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~62 ),
.cin0(\Add2~42 ),
.cin1(\Add2~42COUT1_180 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~35_combout ),
.regout(),
.cout(\Add2~37 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~35 .cin0_used = "true";
defparam \Add2~35 .cin1_used = "true";
defparam \Add2~35 .cin_used = "true";
defparam \Add2~35 .lut_mask = "c303";
defparam \Add2~35 .operation_mode = "arithmetic";
defparam \Add2~35 .output_mode = "comb_only";
defparam \Add2~35 .register_cascade_mode = "off";
defparam \Add2~35 .sum_lutc_input = "cin";
defparam \Add2~35 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N1
maxii_lcell \cnt_for_high_voltage_time[25] (
// Equation(s):
// cnt_for_high_voltage_time[25] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~35_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~35_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[25]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[25] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[25] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[25] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[25] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[25] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[25] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N0
maxii_lcell \Add2~30 (
// Equation(s):
// \Add2~30_combout = cnt_for_high_voltage_time[26] $ ((((\Add2~37 ))))
// \Add2~32 = CARRY((cnt_for_high_voltage_time[26]) # ((!\Add2~37 )))
// \Add2~32COUT1_181 = CARRY((cnt_for_high_voltage_time[26]) # ((!\Add2~37 )))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[26]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~37 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~30_combout ),
.regout(),
.cout(),
.cout0(\Add2~32 ),
.cout1(\Add2~32COUT1_181 ));
// synopsys translate_off
defparam \Add2~30 .cin_used = "true";
defparam \Add2~30 .lut_mask = "5aaf";
defparam \Add2~30 .operation_mode = "arithmetic";
defparam \Add2~30 .output_mode = "comb_only";
defparam \Add2~30 .register_cascade_mode = "off";
defparam \Add2~30 .sum_lutc_input = "cin";
defparam \Add2~30 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N4
maxii_lcell \cnt_for_high_voltage_time[26] (
// Equation(s):
// cnt_for_high_voltage_time[26] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~30_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~30_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[26]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[26] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[26] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[26] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[26] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[26] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[26] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N1
maxii_lcell \Add2~25 (
// Equation(s):
// \Add2~25_combout = cnt_for_high_voltage_time[27] $ ((((!(!\Add2~37 & \Add2~32 ) # (\Add2~37 & \Add2~32COUT1_181 )))))
// \Add2~27 = CARRY((!cnt_for_high_voltage_time[27] & ((!\Add2~32 ))))
// \Add2~27COUT1_182 = CARRY((!cnt_for_high_voltage_time[27] & ((!\Add2~32COUT1_181 ))))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[27]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~37 ),
.cin0(\Add2~32 ),
.cin1(\Add2~32COUT1_181 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~25_combout ),
.regout(),
.cout(),
.cout0(\Add2~27 ),
.cout1(\Add2~27COUT1_182 ));
// synopsys translate_off
defparam \Add2~25 .cin0_used = "true";
defparam \Add2~25 .cin1_used = "true";
defparam \Add2~25 .cin_used = "true";
defparam \Add2~25 .lut_mask = "a505";
defparam \Add2~25 .operation_mode = "arithmetic";
defparam \Add2~25 .output_mode = "comb_only";
defparam \Add2~25 .register_cascade_mode = "off";
defparam \Add2~25 .sum_lutc_input = "cin";
defparam \Add2~25 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N7
maxii_lcell \cnt_for_high_voltage_time[27] (
// Equation(s):
// cnt_for_high_voltage_time[27] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (\Add2~25_combout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\Add2~25_combout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[27]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[27] .lut_mask = "0020";
defparam \cnt_for_high_voltage_time[27] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[27] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[27] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[27] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[27] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N6
maxii_lcell \Equal4~1 (
// Equation(s):
// \Equal4~1_combout = (!cnt_for_high_voltage_time[26] & (!cnt_for_high_voltage_time[25] & (!cnt_for_high_voltage_time[27] & !cnt_for_high_voltage_time[24])))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[26]),
.datab(cnt_for_high_voltage_time[25]),
.datac(cnt_for_high_voltage_time[27]),
.datad(cnt_for_high_voltage_time[24]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~1_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~1 .lut_mask = "0001";
defparam \Equal4~1 .operation_mode = "normal";
defparam \Equal4~1 .output_mode = "comb_only";
defparam \Equal4~1 .register_cascade_mode = "off";
defparam \Equal4~1 .sum_lutc_input = "datac";
defparam \Equal4~1 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X16_Y5_N2
maxii_lcell \Equal4~2 (
// Equation(s):
// \Equal4~2_combout = (!cnt_for_high_voltage_time[23] & (!cnt_for_high_voltage_time[20] & (!cnt_for_high_voltage_time[21] & !cnt_for_high_voltage_time[22])))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[23]),
.datab(cnt_for_high_voltage_time[20]),
.datac(cnt_for_high_voltage_time[21]),
.datad(cnt_for_high_voltage_time[22]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~2_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~2 .lut_mask = "0001";
defparam \Equal4~2 .operation_mode = "normal";
defparam \Equal4~2 .output_mode = "comb_only";
defparam \Equal4~2 .register_cascade_mode = "off";
defparam \Equal4~2 .sum_lutc_input = "datac";
defparam \Equal4~2 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N2
maxii_lcell \Add2~20 (
// Equation(s):
// \Add2~20_combout = cnt_for_high_voltage_time[28] $ (((((!\Add2~37 & \Add2~27 ) # (\Add2~37 & \Add2~27COUT1_182 )))))
// \Add2~22 = CARRY((cnt_for_high_voltage_time[28]) # ((!\Add2~27 )))
// \Add2~22COUT1_183 = CARRY((cnt_for_high_voltage_time[28]) # ((!\Add2~27COUT1_182 )))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[28]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~37 ),
.cin0(\Add2~27 ),
.cin1(\Add2~27COUT1_182 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~20_combout ),
.regout(),
.cout(),
.cout0(\Add2~22 ),
.cout1(\Add2~22COUT1_183 ));
// synopsys translate_off
defparam \Add2~20 .cin0_used = "true";
defparam \Add2~20 .cin1_used = "true";
defparam \Add2~20 .cin_used = "true";
defparam \Add2~20 .lut_mask = "5aaf";
defparam \Add2~20 .operation_mode = "arithmetic";
defparam \Add2~20 .output_mode = "comb_only";
defparam \Add2~20 .register_cascade_mode = "off";
defparam \Add2~20 .sum_lutc_input = "cin";
defparam \Add2~20 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N6
maxii_lcell \cnt_for_high_voltage_time[28] (
// Equation(s):
// cnt_for_high_voltage_time[28] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & \Add2~20_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\Add2~20_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[28]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[28] .lut_mask = "0200";
defparam \cnt_for_high_voltage_time[28] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[28] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[28] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[28] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[28] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N3
maxii_lcell \Add2~15 (
// Equation(s):
// \Add2~15_combout = (cnt_for_high_voltage_time[29] $ ((!(!\Add2~37 & \Add2~22 ) # (\Add2~37 & \Add2~22COUT1_183 ))))
// \Add2~17 = CARRY(((!cnt_for_high_voltage_time[29] & !\Add2~22 )))
// \Add2~17COUT1_184 = CARRY(((!cnt_for_high_voltage_time[29] & !\Add2~22COUT1_183 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[29]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~37 ),
.cin0(\Add2~22 ),
.cin1(\Add2~22COUT1_183 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~15_combout ),
.regout(),
.cout(),
.cout0(\Add2~17 ),
.cout1(\Add2~17COUT1_184 ));
// synopsys translate_off
defparam \Add2~15 .cin0_used = "true";
defparam \Add2~15 .cin1_used = "true";
defparam \Add2~15 .cin_used = "true";
defparam \Add2~15 .lut_mask = "c303";
defparam \Add2~15 .operation_mode = "arithmetic";
defparam \Add2~15 .output_mode = "comb_only";
defparam \Add2~15 .register_cascade_mode = "off";
defparam \Add2~15 .sum_lutc_input = "cin";
defparam \Add2~15 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N7
maxii_lcell \cnt_for_high_voltage_time[29] (
// Equation(s):
// cnt_for_high_voltage_time[29] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & (posedge_enable_count_high_voltage_time & \Add2~15_combout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(posedge_enable_count_high_voltage_time),
.datad(\Add2~15_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[29]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[29] .lut_mask = "1000";
defparam \cnt_for_high_voltage_time[29] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[29] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[29] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[29] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[29] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N4
maxii_lcell \Add2~10 (
// Equation(s):
// \Add2~10_combout = (cnt_for_high_voltage_time[30] $ (((!\Add2~37 & \Add2~17 ) # (\Add2~37 & \Add2~17COUT1_184 ))))
// \Add2~12 = CARRY(((cnt_for_high_voltage_time[30]) # (!\Add2~17COUT1_184 )))
.clk(gnd),
.dataa(vcc),
.datab(cnt_for_high_voltage_time[30]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~37 ),
.cin0(\Add2~17 ),
.cin1(\Add2~17COUT1_184 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~10_combout ),
.regout(),
.cout(\Add2~12 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~10 .cin0_used = "true";
defparam \Add2~10 .cin1_used = "true";
defparam \Add2~10 .cin_used = "true";
defparam \Add2~10 .lut_mask = "3ccf";
defparam \Add2~10 .operation_mode = "arithmetic";
defparam \Add2~10 .output_mode = "comb_only";
defparam \Add2~10 .register_cascade_mode = "off";
defparam \Add2~10 .sum_lutc_input = "cin";
defparam \Add2~10 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N9
maxii_lcell \cnt_for_high_voltage_time[30] (
// Equation(s):
// cnt_for_high_voltage_time[30] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[0][0]~regout & (\Add2~10_combout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[0][0]~regout ),
.datac(\Add2~10_combout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[30]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[30] .lut_mask = "0020";
defparam \cnt_for_high_voltage_time[30] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[30] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[30] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[30] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[30] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N5
maxii_lcell \Add2~5 (
// Equation(s):
// \Add2~5_combout = ((\Add2~12 $ (!cnt_for_high_voltage_time[31])))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(vcc),
.datad(cnt_for_high_voltage_time[31]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(\Add2~12 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Add2~5_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Add2~5 .cin_used = "true";
defparam \Add2~5 .lut_mask = "f00f";
defparam \Add2~5 .operation_mode = "normal";
defparam \Add2~5 .output_mode = "comb_only";
defparam \Add2~5 .register_cascade_mode = "off";
defparam \Add2~5 .sum_lutc_input = "cin";
defparam \Add2~5 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X15_Y5_N8
maxii_lcell \cnt_for_high_voltage_time[31] (
// Equation(s):
// cnt_for_high_voltage_time[31] = DFFEAS((posedge_enable_count_high_voltage_time & (!\fault_flag[0][0]~regout & (\Add2~5_combout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), ,
// \cnt_for_high_voltage_time[18]~129_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(posedge_enable_count_high_voltage_time),
.datab(\fault_flag[0][0]~regout ),
.datac(\Add2~5_combout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cnt_for_high_voltage_time[18]~129_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cnt_for_high_voltage_time[31]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cnt_for_high_voltage_time[31] .lut_mask = "0020";
defparam \cnt_for_high_voltage_time[31] .operation_mode = "normal";
defparam \cnt_for_high_voltage_time[31] .output_mode = "reg_only";
defparam \cnt_for_high_voltage_time[31] .register_cascade_mode = "off";
defparam \cnt_for_high_voltage_time[31] .sum_lutc_input = "datac";
defparam \cnt_for_high_voltage_time[31] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N8
maxii_lcell \Equal4~0 (
// Equation(s):
// \Equal4~0_combout = (!cnt_for_high_voltage_time[31] & (!cnt_for_high_voltage_time[28] & (!cnt_for_high_voltage_time[29] & !cnt_for_high_voltage_time[30])))
.clk(gnd),
.dataa(cnt_for_high_voltage_time[31]),
.datab(cnt_for_high_voltage_time[28]),
.datac(cnt_for_high_voltage_time[29]),
.datad(cnt_for_high_voltage_time[30]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~0_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~0 .lut_mask = "0001";
defparam \Equal4~0 .operation_mode = "normal";
defparam \Equal4~0 .output_mode = "comb_only";
defparam \Equal4~0 .register_cascade_mode = "off";
defparam \Equal4~0 .sum_lutc_input = "datac";
defparam \Equal4~0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N1
maxii_lcell \Equal4~4 (
// Equation(s):
// \Equal4~4_combout = (\Equal4~3_combout & (\Equal4~1_combout & (\Equal4~2_combout & \Equal4~0_combout )))
.clk(gnd),
.dataa(\Equal4~3_combout ),
.datab(\Equal4~1_combout ),
.datac(\Equal4~2_combout ),
.datad(\Equal4~0_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~4_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~4 .lut_mask = "8000";
defparam \Equal4~4 .operation_mode = "normal";
defparam \Equal4~4 .output_mode = "comb_only";
defparam \Equal4~4 .register_cascade_mode = "off";
defparam \Equal4~4 .sum_lutc_input = "datac";
defparam \Equal4~4 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y5_N2
maxii_lcell \Equal4~9 (
// Equation(s):
// \Equal4~9_combout = (\Equal4~6_combout & (\Equal4~5_combout & (\Equal4~8_combout & \Equal4~4_combout )))
.clk(gnd),
.dataa(\Equal4~6_combout ),
.datab(\Equal4~5_combout ),
.datac(\Equal4~8_combout ),
.datad(\Equal4~4_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~9_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~9 .lut_mask = "8000";
defparam \Equal4~9 .operation_mode = "normal";
defparam \Equal4~9 .output_mode = "comb_only";
defparam \Equal4~9 .register_cascade_mode = "off";
defparam \Equal4~9 .sum_lutc_input = "datac";
defparam \Equal4~9 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y4_N1
maxii_lcell \Equal4~10 (
// Equation(s):
// \Equal4~10_combout = (((cnt_for_high_voltage_time[0] & \Equal4~9_combout )))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(cnt_for_high_voltage_time[0]),
.datad(\Equal4~9_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Equal4~10_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Equal4~10 .lut_mask = "f000";
defparam \Equal4~10 .operation_mode = "normal";
defparam \Equal4~10 .output_mode = "comb_only";
defparam \Equal4~10 .register_cascade_mode = "off";
defparam \Equal4~10 .sum_lutc_input = "datac";
defparam \Equal4~10 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y4_N2
maxii_lcell is_high_voltage_time(
// Equation(s):
// \is_high_voltage_time~regout = DFFEAS(((\Equal4~10_combout ) # ((!cache_enable_count_high_voltage_time[1] & cache_enable_count_high_voltage_time[0]))) # (!\Equal4~9_combout ), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , ,
// \cnt_for_high_voltage_time~128_combout , )
.clk(\sys_clk~combout ),
.dataa(cache_enable_count_high_voltage_time[1]),
.datab(\Equal4~9_combout ),
.datac(cache_enable_count_high_voltage_time[0]),
.datad(\Equal4~10_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(\cnt_for_high_voltage_time~128_combout ),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\is_high_voltage_time~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam is_high_voltage_time.lut_mask = "ff73";
defparam is_high_voltage_time.operation_mode = "normal";
defparam is_high_voltage_time.output_mode = "reg_only";
defparam is_high_voltage_time.register_cascade_mode = "off";
defparam is_high_voltage_time.sum_lutc_input = "datac";
defparam is_high_voltage_time.synch_mode = "on";
// synopsys translate_on
// Location: LC_X8_Y5_N7
maxii_lcell \signal_high_voltage[0]~reg0 (
// Equation(s):
// \signal_high_voltage[0]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[0] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[0]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[0]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[0]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[0]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[0]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[0]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[0]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[0]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N2
maxii_lcell \Decoder0~66 (
// Equation(s):
// \Decoder0~66_combout = (\recv_complete~0_combout & (i[0] & (\Decoder0~65 & !i[5])))
.clk(gnd),
.dataa(\recv_complete~0_combout ),
.datab(i[0]),
.datac(\Decoder0~65 ),
.datad(i[5]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~66_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~66 .lut_mask = "0080";
defparam \Decoder0~66 .operation_mode = "normal";
defparam \Decoder0~66 .output_mode = "comb_only";
defparam \Decoder0~66 .register_cascade_mode = "off";
defparam \Decoder0~66 .sum_lutc_input = "datac";
defparam \Decoder0~66 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N1
maxii_lcell \cache_line_sdata[1] (
// Equation(s):
// cache_line_sdata[1] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~66_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~66_combout & ((cache_line_sdata[1]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[1]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~66_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[1]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[1] .lut_mask = "050c";
defparam \cache_line_sdata[1] .operation_mode = "normal";
defparam \cache_line_sdata[1] .output_mode = "reg_only";
defparam \cache_line_sdata[1] .register_cascade_mode = "off";
defparam \cache_line_sdata[1] .sum_lutc_input = "datac";
defparam \cache_line_sdata[1] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N9
maxii_lcell \cache2_line_sdata[1] (
// Equation(s):
// cache2_line_sdata[1] = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache_line_sdata[1]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[1]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[1]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[1] .lut_mask = "0300";
defparam \cache2_line_sdata[1] .operation_mode = "normal";
defparam \cache2_line_sdata[1] .output_mode = "reg_only";
defparam \cache2_line_sdata[1] .register_cascade_mode = "off";
defparam \cache2_line_sdata[1] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[1] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N7
maxii_lcell \signal_high_voltage[1]~reg0 (
// Equation(s):
// \signal_high_voltage[1]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[1] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[1]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[1]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[1]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[1]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[1]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[1]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[1]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[1]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N8
maxii_lcell \Decoder0~64 (
// Equation(s):
// \Decoder0~64_combout = (((!i[5] & !i[0])))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(i[5]),
.datad(i[0]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~64_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~64 .lut_mask = "000f";
defparam \Decoder0~64 .operation_mode = "normal";
defparam \Decoder0~64 .output_mode = "comb_only";
defparam \Decoder0~64 .register_cascade_mode = "off";
defparam \Decoder0~64 .sum_lutc_input = "datac";
defparam \Decoder0~64 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N2
maxii_lcell \always3~0 (
// Equation(s):
// \always3~0_combout = (((\filter_line_sen~regout & \posedge_line_sclk~regout )))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(\filter_line_sen~regout ),
.datad(\posedge_line_sclk~regout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\always3~0_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \always3~0 .lut_mask = "f000";
defparam \always3~0 .operation_mode = "normal";
defparam \always3~0 .output_mode = "comb_only";
defparam \always3~0 .register_cascade_mode = "off";
defparam \always3~0 .sum_lutc_input = "datac";
defparam \always3~0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N5
maxii_lcell \Decoder0~68 (
// Equation(s):
// \Decoder0~68_combout = (!i[4] & (i[1] & (\always3~0_combout & \recv_complete~9_combout )))
.clk(gnd),
.dataa(i[4]),
.datab(i[1]),
.datac(\always3~0_combout ),
.datad(\recv_complete~9_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~68_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~68 .lut_mask = "4000";
defparam \Decoder0~68 .operation_mode = "normal";
defparam \Decoder0~68 .output_mode = "comb_only";
defparam \Decoder0~68 .register_cascade_mode = "off";
defparam \Decoder0~68 .sum_lutc_input = "datac";
defparam \Decoder0~68 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y7_N4
maxii_lcell \Decoder0~102 (
// Equation(s):
// \Decoder0~102_combout = (!i[3] & (!i[2] & (\Decoder0~64_combout & \Decoder0~68_combout )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(\Decoder0~64_combout ),
.datad(\Decoder0~68_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~102_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~102 .lut_mask = "1000";
defparam \Decoder0~102 .operation_mode = "normal";
defparam \Decoder0~102 .output_mode = "comb_only";
defparam \Decoder0~102 .register_cascade_mode = "off";
defparam \Decoder0~102 .sum_lutc_input = "datac";
defparam \Decoder0~102 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y7_N5
maxii_lcell \cache_line_sdata[2] (
// Equation(s):
// cache_line_sdata[2] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~102_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~102_combout & (cache_line_sdata[2])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[2]),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~102_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[2]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[2] .lut_mask = "0322";
defparam \cache_line_sdata[2] .operation_mode = "normal";
defparam \cache_line_sdata[2] .output_mode = "reg_only";
defparam \cache_line_sdata[2] .register_cascade_mode = "off";
defparam \cache_line_sdata[2] .sum_lutc_input = "datac";
defparam \cache_line_sdata[2] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N0
maxii_lcell \cache2_line_sdata[2] (
// Equation(s):
// cache2_line_sdata[2] = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache_line_sdata[2])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[2]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[2]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[2] .lut_mask = "0500";
defparam \cache2_line_sdata[2] .operation_mode = "normal";
defparam \cache2_line_sdata[2] .output_mode = "reg_only";
defparam \cache2_line_sdata[2] .register_cascade_mode = "off";
defparam \cache2_line_sdata[2] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[2] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N9
maxii_lcell \signal_high_voltage[2]~reg0 (
// Equation(s):
// \signal_high_voltage[2]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[2] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[2]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[2]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[2]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[2]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[2]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[2]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[2]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[2]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N2
maxii_lcell \Decoder0~69 (
// Equation(s):
// \Decoder0~69_combout = ((i[0] & (i[1] & \Decoder0~65 )))
.clk(gnd),
.dataa(vcc),
.datab(i[0]),
.datac(i[1]),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~69_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~69 .lut_mask = "c000";
defparam \Decoder0~69 .operation_mode = "normal";
defparam \Decoder0~69 .output_mode = "comb_only";
defparam \Decoder0~69 .register_cascade_mode = "off";
defparam \Decoder0~69 .sum_lutc_input = "datac";
defparam \Decoder0~69 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N3
maxii_lcell \Decoder0~103 (
// Equation(s):
// \Decoder0~103_combout = (!i[2] & (!i[5] & (\Decoder0~69_combout & !i[3])))
.clk(gnd),
.dataa(i[2]),
.datab(i[5]),
.datac(\Decoder0~69_combout ),
.datad(i[3]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~103_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~103 .lut_mask = "0010";
defparam \Decoder0~103 .operation_mode = "normal";
defparam \Decoder0~103 .output_mode = "comb_only";
defparam \Decoder0~103 .register_cascade_mode = "off";
defparam \Decoder0~103 .sum_lutc_input = "datac";
defparam \Decoder0~103 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N7
maxii_lcell \cache_line_sdata[3] (
// Equation(s):
// cache_line_sdata[3] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~103_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~103_combout & (cache_line_sdata[3])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[3]),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~103_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[3]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[3] .lut_mask = "0322";
defparam \cache_line_sdata[3] .operation_mode = "normal";
defparam \cache_line_sdata[3] .output_mode = "reg_only";
defparam \cache_line_sdata[3] .register_cascade_mode = "off";
defparam \cache_line_sdata[3] .sum_lutc_input = "datac";
defparam \cache_line_sdata[3] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y6_N5
maxii_lcell \cache2_line_sdata[3] (
// Equation(s):
// cache2_line_sdata[3] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[3])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[3]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[3]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[3] .lut_mask = "1100";
defparam \cache2_line_sdata[3] .operation_mode = "normal";
defparam \cache2_line_sdata[3] .output_mode = "reg_only";
defparam \cache2_line_sdata[3] .register_cascade_mode = "off";
defparam \cache2_line_sdata[3] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[3] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y5_N4
maxii_lcell \signal_high_voltage[3]~reg0 (
// Equation(s):
// \signal_high_voltage[3]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[3] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[3]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[3]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[3]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[3]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[3]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[3]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[3]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[3]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N8
maxii_lcell \Decoder0~70 (
// Equation(s):
// \Decoder0~70_combout = ((!i[1] & (!i[5] & !i[0])))
.clk(gnd),
.dataa(vcc),
.datab(i[1]),
.datac(i[5]),
.datad(i[0]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~70_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~70 .lut_mask = "0003";
defparam \Decoder0~70 .operation_mode = "normal";
defparam \Decoder0~70 .output_mode = "comb_only";
defparam \Decoder0~70 .register_cascade_mode = "off";
defparam \Decoder0~70 .sum_lutc_input = "datac";
defparam \Decoder0~70 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N3
maxii_lcell \Decoder0~71 (
// Equation(s):
// \Decoder0~71_combout = (i[2] & (\Decoder0~70_combout & (!i[3] & \Decoder0~65 )))
.clk(gnd),
.dataa(i[2]),
.datab(\Decoder0~70_combout ),
.datac(i[3]),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~71_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~71 .lut_mask = "0800";
defparam \Decoder0~71 .operation_mode = "normal";
defparam \Decoder0~71 .output_mode = "comb_only";
defparam \Decoder0~71 .register_cascade_mode = "off";
defparam \Decoder0~71 .sum_lutc_input = "datac";
defparam \Decoder0~71 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N4
maxii_lcell \cache_line_sdata[4] (
// Equation(s):
// cache_line_sdata[4] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~71_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~71_combout & ((cache_line_sdata[4]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[4]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~71_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[4]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[4] .lut_mask = "050c";
defparam \cache_line_sdata[4] .operation_mode = "normal";
defparam \cache_line_sdata[4] .output_mode = "reg_only";
defparam \cache_line_sdata[4] .register_cascade_mode = "off";
defparam \cache_line_sdata[4] .sum_lutc_input = "datac";
defparam \cache_line_sdata[4] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y6_N2
maxii_lcell \cache2_line_sdata[4] (
// Equation(s):
// cache2_line_sdata[4] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[4])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[4]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[4]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[4] .lut_mask = "1100";
defparam \cache2_line_sdata[4] .operation_mode = "normal";
defparam \cache2_line_sdata[4] .output_mode = "reg_only";
defparam \cache2_line_sdata[4] .register_cascade_mode = "off";
defparam \cache2_line_sdata[4] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[4] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y5_N2
maxii_lcell \signal_high_voltage[4]~reg0 (
// Equation(s):
// \signal_high_voltage[4]~reg0_regout = DFFEAS((cache2_line_sdata[4] & (\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[4]),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[4]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[4]~reg0 .lut_mask = "0008";
defparam \signal_high_voltage[4]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[4]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[4]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[4]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[4]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N0
maxii_lcell \Decoder0~72 (
// Equation(s):
// \Decoder0~72_combout = ((i[0] & (!i[1] & \Decoder0~65 )))
.clk(gnd),
.dataa(vcc),
.datab(i[0]),
.datac(i[1]),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~72_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~72 .lut_mask = "0c00";
defparam \Decoder0~72 .operation_mode = "normal";
defparam \Decoder0~72 .output_mode = "comb_only";
defparam \Decoder0~72 .register_cascade_mode = "off";
defparam \Decoder0~72 .sum_lutc_input = "datac";
defparam \Decoder0~72 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N8
maxii_lcell \Decoder0~104 (
// Equation(s):
// \Decoder0~104_combout = (!i[5] & (i[2] & (!i[3] & \Decoder0~72_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~72_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~104_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~104 .lut_mask = "0400";
defparam \Decoder0~104 .operation_mode = "normal";
defparam \Decoder0~104 .output_mode = "comb_only";
defparam \Decoder0~104 .register_cascade_mode = "off";
defparam \Decoder0~104 .sum_lutc_input = "datac";
defparam \Decoder0~104 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N9
maxii_lcell \cache_line_sdata[5] (
// Equation(s):
// cache_line_sdata[5] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~104_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~104_combout & ((cache_line_sdata[5]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[5]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~104_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[5]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[5] .lut_mask = "050c";
defparam \cache_line_sdata[5] .operation_mode = "normal";
defparam \cache_line_sdata[5] .output_mode = "reg_only";
defparam \cache_line_sdata[5] .register_cascade_mode = "off";
defparam \cache_line_sdata[5] .sum_lutc_input = "datac";
defparam \cache_line_sdata[5] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N0
maxii_lcell \cache2_line_sdata[5] (
// Equation(s):
// cache2_line_sdata[5] = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache_line_sdata[5]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[5]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[5]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[5] .lut_mask = "0300";
defparam \cache2_line_sdata[5] .operation_mode = "normal";
defparam \cache2_line_sdata[5] .output_mode = "reg_only";
defparam \cache2_line_sdata[5] .register_cascade_mode = "off";
defparam \cache2_line_sdata[5] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[5] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N8
maxii_lcell \signal_high_voltage[5]~reg0 (
// Equation(s):
// \signal_high_voltage[5]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[5] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[5]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[5]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[5]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[5]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[5]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[5]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[5]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[5]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N4
maxii_lcell \Decoder0~73 (
// Equation(s):
// \Decoder0~73_combout = (!i[3] & (((i[2]))))
.clk(gnd),
.dataa(i[3]),
.datab(vcc),
.datac(i[2]),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~73_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~73 .lut_mask = "5050";
defparam \Decoder0~73 .operation_mode = "normal";
defparam \Decoder0~73 .output_mode = "comb_only";
defparam \Decoder0~73 .register_cascade_mode = "off";
defparam \Decoder0~73 .sum_lutc_input = "datac";
defparam \Decoder0~73 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N9
maxii_lcell \Decoder0~105 (
// Equation(s):
// \Decoder0~105_combout = (!i[5] & (!i[0] & (\Decoder0~68_combout & \Decoder0~73_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[0]),
.datac(\Decoder0~68_combout ),
.datad(\Decoder0~73_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~105_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~105 .lut_mask = "1000";
defparam \Decoder0~105 .operation_mode = "normal";
defparam \Decoder0~105 .output_mode = "comb_only";
defparam \Decoder0~105 .register_cascade_mode = "off";
defparam \Decoder0~105 .sum_lutc_input = "datac";
defparam \Decoder0~105 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N4
maxii_lcell \cache_line_sdata[6] (
// Equation(s):
// cache_line_sdata[6] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~105_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~105_combout & ((cache_line_sdata[6]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[6]),
.datad(\Decoder0~105_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[6]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[6] .lut_mask = "1130";
defparam \cache_line_sdata[6] .operation_mode = "normal";
defparam \cache_line_sdata[6] .output_mode = "reg_only";
defparam \cache_line_sdata[6] .register_cascade_mode = "off";
defparam \cache_line_sdata[6] .sum_lutc_input = "datac";
defparam \cache_line_sdata[6] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N1
maxii_lcell \cache2_line_sdata[6] (
// Equation(s):
// cache2_line_sdata[6] = DFFEAS((cache_line_sdata[6] & (((!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[6]),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[6]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[6] .lut_mask = "000a";
defparam \cache2_line_sdata[6] .operation_mode = "normal";
defparam \cache2_line_sdata[6] .output_mode = "reg_only";
defparam \cache2_line_sdata[6] .register_cascade_mode = "off";
defparam \cache2_line_sdata[6] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[6] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N7
maxii_lcell \signal_high_voltage[6]~reg0 (
// Equation(s):
// \signal_high_voltage[6]~reg0_regout = DFFEAS((\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & (cache2_line_sdata[6] & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\is_high_voltage_time~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(cache2_line_sdata[6]),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[6]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[6]~reg0 .lut_mask = "0020";
defparam \signal_high_voltage[6]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[6]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[6]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[6]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[6]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N9
maxii_lcell \Decoder0~106 (
// Equation(s):
// \Decoder0~106_combout = (i[2] & (!i[5] & (\Decoder0~69_combout & !i[3])))
.clk(gnd),
.dataa(i[2]),
.datab(i[5]),
.datac(\Decoder0~69_combout ),
.datad(i[3]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~106_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~106 .lut_mask = "0020";
defparam \Decoder0~106 .operation_mode = "normal";
defparam \Decoder0~106 .output_mode = "comb_only";
defparam \Decoder0~106 .register_cascade_mode = "off";
defparam \Decoder0~106 .sum_lutc_input = "datac";
defparam \Decoder0~106 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N1
maxii_lcell \cache_line_sdata[7] (
// Equation(s):
// cache_line_sdata[7] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~106_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~106_combout & ((cache_line_sdata[7]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[7]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~106_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[7]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[7] .lut_mask = "050c";
defparam \cache_line_sdata[7] .operation_mode = "normal";
defparam \cache_line_sdata[7] .output_mode = "reg_only";
defparam \cache_line_sdata[7] .register_cascade_mode = "off";
defparam \cache_line_sdata[7] .sum_lutc_input = "datac";
defparam \cache_line_sdata[7] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N0
maxii_lcell \cache2_line_sdata[7] (
// Equation(s):
// cache2_line_sdata[7] = DFFEAS((cache_line_sdata[7] & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[7]),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[7]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[7] .lut_mask = "0202";
defparam \cache2_line_sdata[7] .operation_mode = "normal";
defparam \cache2_line_sdata[7] .output_mode = "reg_only";
defparam \cache2_line_sdata[7] .register_cascade_mode = "off";
defparam \cache2_line_sdata[7] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[7] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y4_N4
maxii_lcell \signal_high_voltage[7]~reg0 (
// Equation(s):
// \signal_high_voltage[7]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[7] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[7]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[7]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[7]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[7]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[7]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[7]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[7]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[7]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N6
maxii_lcell \Decoder0~107 (
// Equation(s):
// \Decoder0~107_combout = (!i[2] & (\Decoder0~70_combout & (i[3] & \Decoder0~65 )))
.clk(gnd),
.dataa(i[2]),
.datab(\Decoder0~70_combout ),
.datac(i[3]),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~107_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~107 .lut_mask = "4000";
defparam \Decoder0~107 .operation_mode = "normal";
defparam \Decoder0~107 .output_mode = "comb_only";
defparam \Decoder0~107 .register_cascade_mode = "off";
defparam \Decoder0~107 .sum_lutc_input = "datac";
defparam \Decoder0~107 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N7
maxii_lcell \cache_line_sdata[8] (
// Equation(s):
// cache_line_sdata[8] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~107_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~107_combout & (cache_line_sdata[8])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[8]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~107_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[8]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[8] .lut_mask = "0544";
defparam \cache_line_sdata[8] .operation_mode = "normal";
defparam \cache_line_sdata[8] .output_mode = "reg_only";
defparam \cache_line_sdata[8] .register_cascade_mode = "off";
defparam \cache_line_sdata[8] .sum_lutc_input = "datac";
defparam \cache_line_sdata[8] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N3
maxii_lcell \cache2_line_sdata[8] (
// Equation(s):
// cache2_line_sdata[8] = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache_line_sdata[8])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[8]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[8]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[8] .lut_mask = "0500";
defparam \cache2_line_sdata[8] .operation_mode = "normal";
defparam \cache2_line_sdata[8] .output_mode = "reg_only";
defparam \cache2_line_sdata[8] .register_cascade_mode = "off";
defparam \cache2_line_sdata[8] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[8] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y5_N3
maxii_lcell \signal_high_voltage[8]~reg0 (
// Equation(s):
// \signal_high_voltage[8]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[8] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[8]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[8]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[8]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[8]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[8]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[8]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[8]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[8]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N2
maxii_lcell \Decoder0~108 (
// Equation(s):
// \Decoder0~108_combout = (!i[5] & (!i[2] & (i[3] & \Decoder0~72_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~72_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~108_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~108 .lut_mask = "1000";
defparam \Decoder0~108 .operation_mode = "normal";
defparam \Decoder0~108 .output_mode = "comb_only";
defparam \Decoder0~108 .register_cascade_mode = "off";
defparam \Decoder0~108 .sum_lutc_input = "datac";
defparam \Decoder0~108 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N0
maxii_lcell \cache_line_sdata[9] (
// Equation(s):
// cache_line_sdata[9] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~108_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~108_combout & ((cache_line_sdata[9]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[9]),
.datad(\Decoder0~108_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[9]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[9] .lut_mask = "1130";
defparam \cache_line_sdata[9] .operation_mode = "normal";
defparam \cache_line_sdata[9] .output_mode = "reg_only";
defparam \cache_line_sdata[9] .register_cascade_mode = "off";
defparam \cache_line_sdata[9] .sum_lutc_input = "datac";
defparam \cache_line_sdata[9] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N6
maxii_lcell \cache2_line_sdata[9] (
// Equation(s):
// cache2_line_sdata[9] = DFFEAS((cache_line_sdata[9] & (((!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[9]),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[9]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[9] .lut_mask = "000a";
defparam \cache2_line_sdata[9] .operation_mode = "normal";
defparam \cache2_line_sdata[9] .output_mode = "reg_only";
defparam \cache2_line_sdata[9] .register_cascade_mode = "off";
defparam \cache2_line_sdata[9] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[9] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y4_N6
maxii_lcell \signal_high_voltage[9]~reg0 (
// Equation(s):
// \signal_high_voltage[9]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & (\is_high_voltage_time~regout & cache2_line_sdata[9]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\is_high_voltage_time~regout ),
.datad(cache2_line_sdata[9]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[9]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[9]~reg0 .lut_mask = "1000";
defparam \signal_high_voltage[9]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[9]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[9]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[9]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[9]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N1
maxii_lcell \Decoder0~74 (
// Equation(s):
// \Decoder0~74_combout = (((!i[2] & i[3])))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(i[2]),
.datad(i[3]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~74_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~74 .lut_mask = "0f00";
defparam \Decoder0~74 .operation_mode = "normal";
defparam \Decoder0~74 .output_mode = "comb_only";
defparam \Decoder0~74 .register_cascade_mode = "off";
defparam \Decoder0~74 .sum_lutc_input = "datac";
defparam \Decoder0~74 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N8
maxii_lcell \Decoder0~109 (
// Equation(s):
// \Decoder0~109_combout = (!i[0] & (!i[5] & (\Decoder0~74_combout & \Decoder0~68_combout )))
.clk(gnd),
.dataa(i[0]),
.datab(i[5]),
.datac(\Decoder0~74_combout ),
.datad(\Decoder0~68_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~109_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~109 .lut_mask = "1000";
defparam \Decoder0~109 .operation_mode = "normal";
defparam \Decoder0~109 .output_mode = "comb_only";
defparam \Decoder0~109 .register_cascade_mode = "off";
defparam \Decoder0~109 .sum_lutc_input = "datac";
defparam \Decoder0~109 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N9
maxii_lcell \cache_line_sdata[10] (
// Equation(s):
// cache_line_sdata[10] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~109_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~109_combout & (cache_line_sdata[10])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[10]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~109_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[10]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[10] .lut_mask = "0544";
defparam \cache_line_sdata[10] .operation_mode = "normal";
defparam \cache_line_sdata[10] .output_mode = "reg_only";
defparam \cache_line_sdata[10] .register_cascade_mode = "off";
defparam \cache_line_sdata[10] .sum_lutc_input = "datac";
defparam \cache_line_sdata[10] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N0
maxii_lcell \cache2_line_sdata[10] (
// Equation(s):
// cache2_line_sdata[10] = DFFEAS(((cache_line_sdata[10] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache_line_sdata[10]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[10]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[10] .lut_mask = "000c";
defparam \cache2_line_sdata[10] .operation_mode = "normal";
defparam \cache2_line_sdata[10] .output_mode = "reg_only";
defparam \cache2_line_sdata[10] .register_cascade_mode = "off";
defparam \cache2_line_sdata[10] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[10] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N6
maxii_lcell \signal_high_voltage[10]~reg0 (
// Equation(s):
// \signal_high_voltage[10]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & cache2_line_sdata[10]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(cache2_line_sdata[10]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[10]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[10]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[10]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[10]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[10]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[10]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[10]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N8
maxii_lcell \Decoder0~110 (
// Equation(s):
// \Decoder0~110_combout = (!i[5] & (i[3] & (!i[2] & \Decoder0~69_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[3]),
.datac(i[2]),
.datad(\Decoder0~69_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~110_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~110 .lut_mask = "0400";
defparam \Decoder0~110 .operation_mode = "normal";
defparam \Decoder0~110 .output_mode = "comb_only";
defparam \Decoder0~110 .register_cascade_mode = "off";
defparam \Decoder0~110 .sum_lutc_input = "datac";
defparam \Decoder0~110 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N9
maxii_lcell \cache_line_sdata[11] (
// Equation(s):
// cache_line_sdata[11] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~110_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~110_combout & ((cache_line_sdata[11]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[11]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~110_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[11]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[11] .lut_mask = "050c";
defparam \cache_line_sdata[11] .operation_mode = "normal";
defparam \cache_line_sdata[11] .output_mode = "reg_only";
defparam \cache_line_sdata[11] .register_cascade_mode = "off";
defparam \cache_line_sdata[11] .sum_lutc_input = "datac";
defparam \cache_line_sdata[11] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N6
maxii_lcell \cache2_line_sdata[11] (
// Equation(s):
// cache2_line_sdata[11] = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache_line_sdata[11])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[11]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[11]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[11] .lut_mask = "0500";
defparam \cache2_line_sdata[11] .operation_mode = "normal";
defparam \cache2_line_sdata[11] .output_mode = "reg_only";
defparam \cache2_line_sdata[11] .register_cascade_mode = "off";
defparam \cache2_line_sdata[11] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[11] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y4_N1
maxii_lcell \signal_high_voltage[11]~reg0 (
// Equation(s):
// \signal_high_voltage[11]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & (\is_high_voltage_time~regout & cache2_line_sdata[11]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\is_high_voltage_time~regout ),
.datad(cache2_line_sdata[11]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[11]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[11]~reg0 .lut_mask = "1000";
defparam \signal_high_voltage[11]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[11]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[11]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[11]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[11]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N2
maxii_lcell \Decoder0~76 (
// Equation(s):
// \Decoder0~76_combout = (i[2] & (\Decoder0~70_combout & (i[3] & \Decoder0~65 )))
.clk(gnd),
.dataa(i[2]),
.datab(\Decoder0~70_combout ),
.datac(i[3]),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~76_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~76 .lut_mask = "8000";
defparam \Decoder0~76 .operation_mode = "normal";
defparam \Decoder0~76 .output_mode = "comb_only";
defparam \Decoder0~76 .register_cascade_mode = "off";
defparam \Decoder0~76 .sum_lutc_input = "datac";
defparam \Decoder0~76 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y8_N0
maxii_lcell \cache_line_sdata[12] (
// Equation(s):
// cache_line_sdata[12] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~76_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~76_combout & (cache_line_sdata[12])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[12]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~76_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[12]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[12] .lut_mask = "0544";
defparam \cache_line_sdata[12] .operation_mode = "normal";
defparam \cache_line_sdata[12] .output_mode = "reg_only";
defparam \cache_line_sdata[12] .register_cascade_mode = "off";
defparam \cache_line_sdata[12] .sum_lutc_input = "datac";
defparam \cache_line_sdata[12] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N2
maxii_lcell \cache2_line_sdata[12] (
// Equation(s):
// cache2_line_sdata[12] = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache_line_sdata[12])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[12]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[12]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[12] .lut_mask = "0500";
defparam \cache2_line_sdata[12] .operation_mode = "normal";
defparam \cache2_line_sdata[12] .output_mode = "reg_only";
defparam \cache2_line_sdata[12] .register_cascade_mode = "off";
defparam \cache2_line_sdata[12] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[12] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y5_N8
maxii_lcell \signal_high_voltage[12]~reg0 (
// Equation(s):
// \signal_high_voltage[12]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[12] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[12]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[12]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[12]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[12]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[12]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[12]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[12]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[12]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N1
maxii_lcell \Decoder0~111 (
// Equation(s):
// \Decoder0~111_combout = (!i[5] & (i[2] & (i[3] & \Decoder0~72_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~72_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~111_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~111 .lut_mask = "4000";
defparam \Decoder0~111 .operation_mode = "normal";
defparam \Decoder0~111 .output_mode = "comb_only";
defparam \Decoder0~111 .register_cascade_mode = "off";
defparam \Decoder0~111 .sum_lutc_input = "datac";
defparam \Decoder0~111 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N5
maxii_lcell \cache_line_sdata[13] (
// Equation(s):
// cache_line_sdata[13] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~111_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~111_combout & ((cache_line_sdata[13]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[13]),
.datad(\Decoder0~111_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[13]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[13] .lut_mask = "1130";
defparam \cache_line_sdata[13] .operation_mode = "normal";
defparam \cache_line_sdata[13] .output_mode = "reg_only";
defparam \cache_line_sdata[13] .register_cascade_mode = "off";
defparam \cache_line_sdata[13] .sum_lutc_input = "datac";
defparam \cache_line_sdata[13] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N5
maxii_lcell \cache2_line_sdata[13] (
// Equation(s):
// cache2_line_sdata[13] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[13])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[13]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[13]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[13] .lut_mask = "1100";
defparam \cache2_line_sdata[13] .operation_mode = "normal";
defparam \cache2_line_sdata[13] .output_mode = "reg_only";
defparam \cache2_line_sdata[13] .register_cascade_mode = "off";
defparam \cache2_line_sdata[13] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[13] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y4_N9
maxii_lcell \signal_high_voltage[13]~reg0 (
// Equation(s):
// \signal_high_voltage[13]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & (\is_high_voltage_time~regout & cache2_line_sdata[13]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\is_high_voltage_time~regout ),
.datad(cache2_line_sdata[13]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[13]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[13]~reg0 .lut_mask = "1000";
defparam \signal_high_voltage[13]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[13]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[13]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[13]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[13]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N1
maxii_lcell \Decoder0~77 (
// Equation(s):
// \Decoder0~77_combout = (\Decoder0~64_combout & (i[3] & (i[2] & \Decoder0~68_combout )))
.clk(gnd),
.dataa(\Decoder0~64_combout ),
.datab(i[3]),
.datac(i[2]),
.datad(\Decoder0~68_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~77_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~77 .lut_mask = "8000";
defparam \Decoder0~77 .operation_mode = "normal";
defparam \Decoder0~77 .output_mode = "comb_only";
defparam \Decoder0~77 .register_cascade_mode = "off";
defparam \Decoder0~77 .sum_lutc_input = "datac";
defparam \Decoder0~77 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N2
maxii_lcell \cache_line_sdata[14] (
// Equation(s):
// cache_line_sdata[14] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~77_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~77_combout & ((cache_line_sdata[14]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[14]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~77_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[14]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[14] .lut_mask = "050c";
defparam \cache_line_sdata[14] .operation_mode = "normal";
defparam \cache_line_sdata[14] .output_mode = "reg_only";
defparam \cache_line_sdata[14] .register_cascade_mode = "off";
defparam \cache_line_sdata[14] .sum_lutc_input = "datac";
defparam \cache_line_sdata[14] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N5
maxii_lcell \cache2_line_sdata[14] (
// Equation(s):
// cache2_line_sdata[14] = DFFEAS(((cache_line_sdata[14] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache_line_sdata[14]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[14]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[14] .lut_mask = "000c";
defparam \cache2_line_sdata[14] .operation_mode = "normal";
defparam \cache2_line_sdata[14] .output_mode = "reg_only";
defparam \cache2_line_sdata[14] .register_cascade_mode = "off";
defparam \cache2_line_sdata[14] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[14] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y4_N6
maxii_lcell \signal_high_voltage[14]~reg0 (
// Equation(s):
// \signal_high_voltage[14]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (\is_high_voltage_time~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[14]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[14]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[14]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[14]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[14]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[14]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[14]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[14]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[14]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N4
maxii_lcell \Decoder0~112 (
// Equation(s):
// \Decoder0~112_combout = (!i[5] & (i[3] & (i[2] & \Decoder0~69_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[3]),
.datac(i[2]),
.datad(\Decoder0~69_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~112_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~112 .lut_mask = "4000";
defparam \Decoder0~112 .operation_mode = "normal";
defparam \Decoder0~112 .output_mode = "comb_only";
defparam \Decoder0~112 .register_cascade_mode = "off";
defparam \Decoder0~112 .sum_lutc_input = "datac";
defparam \Decoder0~112 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N5
maxii_lcell \cache_line_sdata[15] (
// Equation(s):
// cache_line_sdata[15] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~112_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~112_combout & ((cache_line_sdata[15]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[15]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~112_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[15]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[15] .lut_mask = "050c";
defparam \cache_line_sdata[15] .operation_mode = "normal";
defparam \cache_line_sdata[15] .output_mode = "reg_only";
defparam \cache_line_sdata[15] .register_cascade_mode = "off";
defparam \cache_line_sdata[15] .sum_lutc_input = "datac";
defparam \cache_line_sdata[15] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N3
maxii_lcell \cache2_line_sdata[15] (
// Equation(s):
// cache2_line_sdata[15] = DFFEAS(((cache_line_sdata[15] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache_line_sdata[15]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[15]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[15] .lut_mask = "000c";
defparam \cache2_line_sdata[15] .operation_mode = "normal";
defparam \cache2_line_sdata[15] .output_mode = "reg_only";
defparam \cache2_line_sdata[15] .register_cascade_mode = "off";
defparam \cache2_line_sdata[15] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[15] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N3
maxii_lcell \signal_high_voltage[15]~reg0 (
// Equation(s):
// \signal_high_voltage[15]~reg0_regout = DFFEAS((\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[15]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\is_high_voltage_time~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[15]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[15]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[15]~reg0 .lut_mask = "0200";
defparam \signal_high_voltage[15]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[15]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[15]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[15]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[15]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N2
maxii_lcell \Decoder0~78 (
// Equation(s):
// \Decoder0~78_combout = (\Decoder0~64_combout & (i[4] & (\always3~0_combout & \recv_complete~9_combout )))
.clk(gnd),
.dataa(\Decoder0~64_combout ),
.datab(i[4]),
.datac(\always3~0_combout ),
.datad(\recv_complete~9_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~78_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~78 .lut_mask = "8000";
defparam \Decoder0~78 .operation_mode = "normal";
defparam \Decoder0~78 .output_mode = "comb_only";
defparam \Decoder0~78 .register_cascade_mode = "off";
defparam \Decoder0~78 .sum_lutc_input = "datac";
defparam \Decoder0~78 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N4
maxii_lcell \Decoder0~113 (
// Equation(s):
// \Decoder0~113_combout = (!i[1] & (!i[2] & (!i[3] & \Decoder0~78_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~78_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~113_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~113 .lut_mask = "0100";
defparam \Decoder0~113 .operation_mode = "normal";
defparam \Decoder0~113 .output_mode = "comb_only";
defparam \Decoder0~113 .register_cascade_mode = "off";
defparam \Decoder0~113 .sum_lutc_input = "datac";
defparam \Decoder0~113 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N5
maxii_lcell \cache_line_sdata[16] (
// Equation(s):
// cache_line_sdata[16] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~113_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~113_combout & ((cache_line_sdata[16]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[16]),
.datad(\Decoder0~113_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[16]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[16] .lut_mask = "1130";
defparam \cache_line_sdata[16] .operation_mode = "normal";
defparam \cache_line_sdata[16] .output_mode = "reg_only";
defparam \cache_line_sdata[16] .register_cascade_mode = "off";
defparam \cache_line_sdata[16] .sum_lutc_input = "datac";
defparam \cache_line_sdata[16] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N7
maxii_lcell \cache2_line_sdata[16] (
// Equation(s):
// cache2_line_sdata[16] = DFFEAS((cache_line_sdata[16] & (((!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[16]),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[16]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[16] .lut_mask = "000a";
defparam \cache2_line_sdata[16] .operation_mode = "normal";
defparam \cache2_line_sdata[16] .output_mode = "reg_only";
defparam \cache2_line_sdata[16] .register_cascade_mode = "off";
defparam \cache2_line_sdata[16] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[16] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N9
maxii_lcell \signal_high_voltage[16]~reg0 (
// Equation(s):
// \signal_high_voltage[16]~reg0_regout = DFFEAS((cache2_line_sdata[16] & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[16]),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[16]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[16]~reg0 .lut_mask = "0200";
defparam \signal_high_voltage[16]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[16]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[16]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[16]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[16]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N7
maxii_lcell \Decoder0~79 (
// Equation(s):
// \Decoder0~79_combout = (i[4] & (\always3~0_combout & (\recv_complete~9_combout & i[0])))
.clk(gnd),
.dataa(i[4]),
.datab(\always3~0_combout ),
.datac(\recv_complete~9_combout ),
.datad(i[0]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~79_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~79 .lut_mask = "8000";
defparam \Decoder0~79 .operation_mode = "normal";
defparam \Decoder0~79 .output_mode = "comb_only";
defparam \Decoder0~79 .register_cascade_mode = "off";
defparam \Decoder0~79 .sum_lutc_input = "datac";
defparam \Decoder0~79 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N0
maxii_lcell \Decoder0~80 (
// Equation(s):
// \Decoder0~80_combout = (!i[5] & (((\Decoder0~79_combout & \recv_complete~0_combout ))))
.clk(gnd),
.dataa(i[5]),
.datab(vcc),
.datac(\Decoder0~79_combout ),
.datad(\recv_complete~0_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~80_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~80 .lut_mask = "5000";
defparam \Decoder0~80 .operation_mode = "normal";
defparam \Decoder0~80 .output_mode = "comb_only";
defparam \Decoder0~80 .register_cascade_mode = "off";
defparam \Decoder0~80 .sum_lutc_input = "datac";
defparam \Decoder0~80 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N1
maxii_lcell \cache_line_sdata[17] (
// Equation(s):
// cache_line_sdata[17] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~80_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~80_combout & ((cache_line_sdata[17]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[17]),
.datad(\Decoder0~80_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[17]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[17] .lut_mask = "1130";
defparam \cache_line_sdata[17] .operation_mode = "normal";
defparam \cache_line_sdata[17] .output_mode = "reg_only";
defparam \cache_line_sdata[17] .register_cascade_mode = "off";
defparam \cache_line_sdata[17] .sum_lutc_input = "datac";
defparam \cache_line_sdata[17] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N6
maxii_lcell \cache2_line_sdata[17] (
// Equation(s):
// cache2_line_sdata[17] = DFFEAS((!\fault_flag[1][0]~regout & (((cache_line_sdata[17] & !\fault_flag[0][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(vcc),
.datac(cache_line_sdata[17]),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[17]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[17] .lut_mask = "0050";
defparam \cache2_line_sdata[17] .operation_mode = "normal";
defparam \cache2_line_sdata[17] .output_mode = "reg_only";
defparam \cache2_line_sdata[17] .register_cascade_mode = "off";
defparam \cache2_line_sdata[17] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[17] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N7
maxii_lcell \signal_high_voltage[17]~reg0 (
// Equation(s):
// \signal_high_voltage[17]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[17] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[17]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[17]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[17]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[17]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[17]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[17]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[17]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[17]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N8
maxii_lcell \Decoder0~114 (
// Equation(s):
// \Decoder0~114_combout = (i[1] & (!i[2] & (!i[3] & \Decoder0~78_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~78_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~114_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~114 .lut_mask = "0200";
defparam \Decoder0~114 .operation_mode = "normal";
defparam \Decoder0~114 .output_mode = "comb_only";
defparam \Decoder0~114 .register_cascade_mode = "off";
defparam \Decoder0~114 .sum_lutc_input = "datac";
defparam \Decoder0~114 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N9
maxii_lcell \cache_line_sdata[18] (
// Equation(s):
// cache_line_sdata[18] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~114_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~114_combout & ((cache_line_sdata[18]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[18]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~114_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[18]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[18] .lut_mask = "050c";
defparam \cache_line_sdata[18] .operation_mode = "normal";
defparam \cache_line_sdata[18] .output_mode = "reg_only";
defparam \cache_line_sdata[18] .register_cascade_mode = "off";
defparam \cache_line_sdata[18] .sum_lutc_input = "datac";
defparam \cache_line_sdata[18] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N4
maxii_lcell \cache2_line_sdata[18] (
// Equation(s):
// cache2_line_sdata[18] = DFFEAS(((!\fault_flag[0][0]~regout & (cache_line_sdata[18] & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(cache_line_sdata[18]),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[18]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[18] .lut_mask = "0030";
defparam \cache2_line_sdata[18] .operation_mode = "normal";
defparam \cache2_line_sdata[18] .output_mode = "reg_only";
defparam \cache2_line_sdata[18] .register_cascade_mode = "off";
defparam \cache2_line_sdata[18] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[18] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N0
maxii_lcell \signal_high_voltage[18]~reg0 (
// Equation(s):
// \signal_high_voltage[18]~reg0_regout = DFFEAS((\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[18]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\is_high_voltage_time~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[18]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[18]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[18]~reg0 .lut_mask = "0200";
defparam \signal_high_voltage[18]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[18]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[18]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[18]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[18]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y9_N7
maxii_lcell \Decoder0~67 (
// Equation(s):
// \Decoder0~67_combout = (((!i[2] & !i[3])))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(i[2]),
.datad(i[3]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~67_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~67 .lut_mask = "000f";
defparam \Decoder0~67 .operation_mode = "normal";
defparam \Decoder0~67 .output_mode = "comb_only";
defparam \Decoder0~67 .register_cascade_mode = "off";
defparam \Decoder0~67 .sum_lutc_input = "datac";
defparam \Decoder0~67 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y9_N4
maxii_lcell \Decoder0~81 (
// Equation(s):
// \Decoder0~81_combout = (i[1] & (!i[5] & (\Decoder0~67_combout & \Decoder0~79_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[5]),
.datac(\Decoder0~67_combout ),
.datad(\Decoder0~79_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~81_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~81 .lut_mask = "2000";
defparam \Decoder0~81 .operation_mode = "normal";
defparam \Decoder0~81 .output_mode = "comb_only";
defparam \Decoder0~81 .register_cascade_mode = "off";
defparam \Decoder0~81 .sum_lutc_input = "datac";
defparam \Decoder0~81 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y9_N5
maxii_lcell \cache_line_sdata[19] (
// Equation(s):
// cache_line_sdata[19] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~81_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~81_combout & ((cache_line_sdata[19]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[19]),
.datad(\Decoder0~81_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[19]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[19] .lut_mask = "1130";
defparam \cache_line_sdata[19] .operation_mode = "normal";
defparam \cache_line_sdata[19] .output_mode = "reg_only";
defparam \cache_line_sdata[19] .register_cascade_mode = "off";
defparam \cache_line_sdata[19] .sum_lutc_input = "datac";
defparam \cache_line_sdata[19] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y6_N8
maxii_lcell \cache2_line_sdata[19] (
// Equation(s):
// cache2_line_sdata[19] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & (cache_line_sdata[19]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(cache_line_sdata[19]),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[19]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[19] .lut_mask = "1010";
defparam \cache2_line_sdata[19] .operation_mode = "normal";
defparam \cache2_line_sdata[19] .output_mode = "reg_only";
defparam \cache2_line_sdata[19] .register_cascade_mode = "off";
defparam \cache2_line_sdata[19] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[19] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y5_N5
maxii_lcell \signal_high_voltage[19]~reg0 (
// Equation(s):
// \signal_high_voltage[19]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[19] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[19]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[19]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[19]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[19]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[19]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[19]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[19]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[19]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N1
maxii_lcell \Decoder0~82 (
// Equation(s):
// \Decoder0~82_combout = (i[4] & (!i[0] & (!i[5] & !i[1])))
.clk(gnd),
.dataa(i[4]),
.datab(i[0]),
.datac(i[5]),
.datad(i[1]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~82_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~82 .lut_mask = "0002";
defparam \Decoder0~82 .operation_mode = "normal";
defparam \Decoder0~82 .output_mode = "comb_only";
defparam \Decoder0~82 .register_cascade_mode = "off";
defparam \Decoder0~82 .sum_lutc_input = "datac";
defparam \Decoder0~82 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N2
maxii_lcell \Decoder0~115 (
// Equation(s):
// \Decoder0~115_combout = (\filter_line_sen~regout & (i[2] & (\posedge_line_sclk~regout & \recv_complete~9_combout )))
.clk(gnd),
.dataa(\filter_line_sen~regout ),
.datab(i[2]),
.datac(\posedge_line_sclk~regout ),
.datad(\recv_complete~9_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~115_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~115 .lut_mask = "8000";
defparam \Decoder0~115 .operation_mode = "normal";
defparam \Decoder0~115 .output_mode = "comb_only";
defparam \Decoder0~115 .register_cascade_mode = "off";
defparam \Decoder0~115 .sum_lutc_input = "datac";
defparam \Decoder0~115 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N6
maxii_lcell \Decoder0~83 (
// Equation(s):
// \Decoder0~83_combout = ((!i[3] & (\Decoder0~82_combout & \Decoder0~115_combout )))
.clk(gnd),
.dataa(vcc),
.datab(i[3]),
.datac(\Decoder0~82_combout ),
.datad(\Decoder0~115_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~83_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~83 .lut_mask = "3000";
defparam \Decoder0~83 .operation_mode = "normal";
defparam \Decoder0~83 .output_mode = "comb_only";
defparam \Decoder0~83 .register_cascade_mode = "off";
defparam \Decoder0~83 .sum_lutc_input = "datac";
defparam \Decoder0~83 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N7
maxii_lcell \cache_line_sdata[20] (
// Equation(s):
// cache_line_sdata[20] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~83_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~83_combout & (cache_line_sdata[20])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[20]),
.datab(\fiter_line_sdata~regout ),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~83_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[20]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[20] .lut_mask = "030a";
defparam \cache_line_sdata[20] .operation_mode = "normal";
defparam \cache_line_sdata[20] .output_mode = "reg_only";
defparam \cache_line_sdata[20] .register_cascade_mode = "off";
defparam \cache_line_sdata[20] .sum_lutc_input = "datac";
defparam \cache_line_sdata[20] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N1
maxii_lcell \cache2_line_sdata[20] (
// Equation(s):
// cache2_line_sdata[20] = DFFEAS((!\fault_flag[1][0]~regout & (((cache_line_sdata[20] & !\fault_flag[0][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(vcc),
.datac(cache_line_sdata[20]),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[20]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[20] .lut_mask = "0050";
defparam \cache2_line_sdata[20] .operation_mode = "normal";
defparam \cache2_line_sdata[20] .output_mode = "reg_only";
defparam \cache2_line_sdata[20] .register_cascade_mode = "off";
defparam \cache2_line_sdata[20] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[20] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N3
maxii_lcell \signal_high_voltage[20]~reg0 (
// Equation(s):
// \signal_high_voltage[20]~reg0_regout = DFFEAS((\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[20]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\is_high_voltage_time~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[20]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[20]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[20]~reg0 .lut_mask = "0200";
defparam \signal_high_voltage[20]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[20]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[20]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[20]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[20]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N2
maxii_lcell \Decoder0~84 (
// Equation(s):
// \Decoder0~84_combout = (!i[1] & (\Decoder0~73_combout & (\Decoder0~79_combout & !i[5])))
.clk(gnd),
.dataa(i[1]),
.datab(\Decoder0~73_combout ),
.datac(\Decoder0~79_combout ),
.datad(i[5]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~84_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~84 .lut_mask = "0040";
defparam \Decoder0~84 .operation_mode = "normal";
defparam \Decoder0~84 .output_mode = "comb_only";
defparam \Decoder0~84 .register_cascade_mode = "off";
defparam \Decoder0~84 .sum_lutc_input = "datac";
defparam \Decoder0~84 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N3
maxii_lcell \cache_line_sdata[21] (
// Equation(s):
// cache_line_sdata[21] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~84_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~84_combout & ((cache_line_sdata[21]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[21]),
.datad(\Decoder0~84_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[21]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[21] .lut_mask = "1130";
defparam \cache_line_sdata[21] .operation_mode = "normal";
defparam \cache_line_sdata[21] .output_mode = "reg_only";
defparam \cache_line_sdata[21] .register_cascade_mode = "off";
defparam \cache_line_sdata[21] .sum_lutc_input = "datac";
defparam \cache_line_sdata[21] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y6_N6
maxii_lcell \cache2_line_sdata[21] (
// Equation(s):
// cache2_line_sdata[21] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & (cache_line_sdata[21]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(cache_line_sdata[21]),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[21]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[21] .lut_mask = "1010";
defparam \cache2_line_sdata[21] .operation_mode = "normal";
defparam \cache2_line_sdata[21] .output_mode = "reg_only";
defparam \cache2_line_sdata[21] .register_cascade_mode = "off";
defparam \cache2_line_sdata[21] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[21] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y6_N4
maxii_lcell \signal_high_voltage[21]~reg0 (
// Equation(s):
// \signal_high_voltage[21]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & (cache2_line_sdata[21] & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(cache2_line_sdata[21]),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[21]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[21]~reg0 .lut_mask = "1000";
defparam \signal_high_voltage[21]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[21]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[21]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[21]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[21]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N0
maxii_lcell \Decoder0~116 (
// Equation(s):
// \Decoder0~116_combout = (i[1] & (i[2] & (!i[3] & \Decoder0~78_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~78_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~116_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~116 .lut_mask = "0800";
defparam \Decoder0~116 .operation_mode = "normal";
defparam \Decoder0~116 .output_mode = "comb_only";
defparam \Decoder0~116 .register_cascade_mode = "off";
defparam \Decoder0~116 .sum_lutc_input = "datac";
defparam \Decoder0~116 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N1
maxii_lcell \cache_line_sdata[22] (
// Equation(s):
// cache_line_sdata[22] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~116_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~116_combout & ((cache_line_sdata[22]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[22]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~116_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[22]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[22] .lut_mask = "050c";
defparam \cache_line_sdata[22] .operation_mode = "normal";
defparam \cache_line_sdata[22] .output_mode = "reg_only";
defparam \cache_line_sdata[22] .register_cascade_mode = "off";
defparam \cache_line_sdata[22] .sum_lutc_input = "datac";
defparam \cache_line_sdata[22] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N9
maxii_lcell \cache2_line_sdata[22] (
// Equation(s):
// cache2_line_sdata[22] = DFFEAS((cache_line_sdata[22] & (((!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[22]),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[22]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[22] .lut_mask = "000a";
defparam \cache2_line_sdata[22] .operation_mode = "normal";
defparam \cache2_line_sdata[22] .output_mode = "reg_only";
defparam \cache2_line_sdata[22] .register_cascade_mode = "off";
defparam \cache2_line_sdata[22] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[22] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N1
maxii_lcell \signal_high_voltage[22]~reg0 (
// Equation(s):
// \signal_high_voltage[22]~reg0_regout = DFFEAS((\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[22]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\is_high_voltage_time~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[22]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[22]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[22]~reg0 .lut_mask = "0200";
defparam \signal_high_voltage[22]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[22]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[22]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[22]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[22]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N8
maxii_lcell \Decoder0~85 (
// Equation(s):
// \Decoder0~85_combout = (i[1] & (\Decoder0~73_combout & (!i[5] & \Decoder0~79_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(\Decoder0~73_combout ),
.datac(i[5]),
.datad(\Decoder0~79_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~85_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~85 .lut_mask = "0800";
defparam \Decoder0~85 .operation_mode = "normal";
defparam \Decoder0~85 .output_mode = "comb_only";
defparam \Decoder0~85 .register_cascade_mode = "off";
defparam \Decoder0~85 .sum_lutc_input = "datac";
defparam \Decoder0~85 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N9
maxii_lcell \cache_line_sdata[23] (
// Equation(s):
// cache_line_sdata[23] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~85_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~85_combout & ((cache_line_sdata[23]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[23]),
.datad(\Decoder0~85_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[23]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[23] .lut_mask = "1130";
defparam \cache_line_sdata[23] .operation_mode = "normal";
defparam \cache_line_sdata[23] .output_mode = "reg_only";
defparam \cache_line_sdata[23] .register_cascade_mode = "off";
defparam \cache_line_sdata[23] .sum_lutc_input = "datac";
defparam \cache_line_sdata[23] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N3
maxii_lcell \cache2_line_sdata[23] (
// Equation(s):
// cache2_line_sdata[23] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[23])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[23]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[23]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[23] .lut_mask = "1100";
defparam \cache2_line_sdata[23] .operation_mode = "normal";
defparam \cache2_line_sdata[23] .output_mode = "reg_only";
defparam \cache2_line_sdata[23] .register_cascade_mode = "off";
defparam \cache2_line_sdata[23] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[23] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y9_N9
maxii_lcell \signal_high_voltage[23]~reg0 (
// Equation(s):
// \signal_high_voltage[23]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[23] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[23]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[23]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[23]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[23]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[23]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[23]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[23]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[23]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N3
maxii_lcell \Decoder0~86 (
// Equation(s):
// \Decoder0~86_combout = (\Decoder0~82_combout & (\always3~0_combout & (\Decoder0~74_combout & \recv_complete~9_combout )))
.clk(gnd),
.dataa(\Decoder0~82_combout ),
.datab(\always3~0_combout ),
.datac(\Decoder0~74_combout ),
.datad(\recv_complete~9_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~86_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~86 .lut_mask = "8000";
defparam \Decoder0~86 .operation_mode = "normal";
defparam \Decoder0~86 .output_mode = "comb_only";
defparam \Decoder0~86 .register_cascade_mode = "off";
defparam \Decoder0~86 .sum_lutc_input = "datac";
defparam \Decoder0~86 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N9
maxii_lcell \cache_line_sdata[24] (
// Equation(s):
// cache_line_sdata[24] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~86_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~86_combout & (cache_line_sdata[24])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[24]),
.datab(\fiter_line_sdata~regout ),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~86_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[24]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[24] .lut_mask = "030a";
defparam \cache_line_sdata[24] .operation_mode = "normal";
defparam \cache_line_sdata[24] .output_mode = "reg_only";
defparam \cache_line_sdata[24] .register_cascade_mode = "off";
defparam \cache_line_sdata[24] .sum_lutc_input = "datac";
defparam \cache_line_sdata[24] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N0
maxii_lcell \cache2_line_sdata[24] (
// Equation(s):
// cache2_line_sdata[24] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[24])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[24]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[24]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[24] .lut_mask = "1100";
defparam \cache2_line_sdata[24] .operation_mode = "normal";
defparam \cache2_line_sdata[24] .output_mode = "reg_only";
defparam \cache2_line_sdata[24] .register_cascade_mode = "off";
defparam \cache2_line_sdata[24] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[24] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y9_N5
maxii_lcell \signal_high_voltage[24]~reg0 (
// Equation(s):
// \signal_high_voltage[24]~reg0_regout = DFFEAS((cache2_line_sdata[24] & (\is_high_voltage_time~regout & (!\fault_flag[1][0]~regout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[24]),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[24]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[24]~reg0 .lut_mask = "0008";
defparam \signal_high_voltage[24]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[24]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[24]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[24]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[24]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N7
maxii_lcell \Decoder0~75 (
// Equation(s):
// \Decoder0~75_combout = (((i[3] & !i[5])))
.clk(gnd),
.dataa(vcc),
.datab(vcc),
.datac(i[3]),
.datad(i[5]),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~75_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~75 .lut_mask = "00f0";
defparam \Decoder0~75 .operation_mode = "normal";
defparam \Decoder0~75 .output_mode = "comb_only";
defparam \Decoder0~75 .register_cascade_mode = "off";
defparam \Decoder0~75 .sum_lutc_input = "datac";
defparam \Decoder0~75 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N8
maxii_lcell \Decoder0~87 (
// Equation(s):
// \Decoder0~87_combout = (!i[1] & (!i[2] & (\Decoder0~75_combout & \Decoder0~79_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(\Decoder0~75_combout ),
.datad(\Decoder0~79_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~87_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~87 .lut_mask = "1000";
defparam \Decoder0~87 .operation_mode = "normal";
defparam \Decoder0~87 .output_mode = "comb_only";
defparam \Decoder0~87 .register_cascade_mode = "off";
defparam \Decoder0~87 .sum_lutc_input = "datac";
defparam \Decoder0~87 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N9
maxii_lcell \cache_line_sdata[25] (
// Equation(s):
// cache_line_sdata[25] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~87_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~87_combout & (cache_line_sdata[25])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[25]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~87_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[25]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[25] .lut_mask = "0544";
defparam \cache_line_sdata[25] .operation_mode = "normal";
defparam \cache_line_sdata[25] .output_mode = "reg_only";
defparam \cache_line_sdata[25] .register_cascade_mode = "off";
defparam \cache_line_sdata[25] .sum_lutc_input = "datac";
defparam \cache_line_sdata[25] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N5
maxii_lcell \cache2_line_sdata[25] (
// Equation(s):
// cache2_line_sdata[25] = DFFEAS(((!\fault_flag[0][0]~regout & (cache_line_sdata[25] & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(cache_line_sdata[25]),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[25]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[25] .lut_mask = "0030";
defparam \cache2_line_sdata[25] .operation_mode = "normal";
defparam \cache2_line_sdata[25] .output_mode = "reg_only";
defparam \cache2_line_sdata[25] .register_cascade_mode = "off";
defparam \cache2_line_sdata[25] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[25] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N9
maxii_lcell \signal_high_voltage[25]~reg0 (
// Equation(s):
// \signal_high_voltage[25]~reg0_regout = DFFEAS((\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & (cache2_line_sdata[25] & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\is_high_voltage_time~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(cache2_line_sdata[25]),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[25]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[25]~reg0 .lut_mask = "0020";
defparam \signal_high_voltage[25]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[25]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[25]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[25]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[25]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N3
maxii_lcell \Decoder0~117 (
// Equation(s):
// \Decoder0~117_combout = (i[3] & (!i[2] & (i[1] & \Decoder0~78_combout )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(i[1]),
.datad(\Decoder0~78_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~117_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~117 .lut_mask = "2000";
defparam \Decoder0~117 .operation_mode = "normal";
defparam \Decoder0~117 .output_mode = "comb_only";
defparam \Decoder0~117 .register_cascade_mode = "off";
defparam \Decoder0~117 .sum_lutc_input = "datac";
defparam \Decoder0~117 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y7_N2
maxii_lcell \cache_line_sdata[26] (
// Equation(s):
// cache_line_sdata[26] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~117_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~117_combout & ((cache_line_sdata[26]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[26]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~117_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[26]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[26] .lut_mask = "050c";
defparam \cache_line_sdata[26] .operation_mode = "normal";
defparam \cache_line_sdata[26] .output_mode = "reg_only";
defparam \cache_line_sdata[26] .register_cascade_mode = "off";
defparam \cache_line_sdata[26] .sum_lutc_input = "datac";
defparam \cache_line_sdata[26] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N2
maxii_lcell \cache2_line_sdata[26] (
// Equation(s):
// cache2_line_sdata[26] = DFFEAS(((!\fault_flag[0][0]~regout & (cache_line_sdata[26] & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(cache_line_sdata[26]),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[26]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[26] .lut_mask = "0030";
defparam \cache2_line_sdata[26] .operation_mode = "normal";
defparam \cache2_line_sdata[26] .output_mode = "reg_only";
defparam \cache2_line_sdata[26] .register_cascade_mode = "off";
defparam \cache2_line_sdata[26] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[26] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N8
maxii_lcell \signal_high_voltage[26]~reg0 (
// Equation(s):
// \signal_high_voltage[26]~reg0_regout = DFFEAS((\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[26]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\is_high_voltage_time~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[26]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[26]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[26]~reg0 .lut_mask = "0200";
defparam \signal_high_voltage[26]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[26]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[26]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[26]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[26]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N4
maxii_lcell \Decoder0~88 (
// Equation(s):
// \Decoder0~88_combout = (i[1] & (!i[2] & (\Decoder0~75_combout & \Decoder0~79_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(\Decoder0~75_combout ),
.datad(\Decoder0~79_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~88_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~88 .lut_mask = "2000";
defparam \Decoder0~88 .operation_mode = "normal";
defparam \Decoder0~88 .output_mode = "comb_only";
defparam \Decoder0~88 .register_cascade_mode = "off";
defparam \Decoder0~88 .sum_lutc_input = "datac";
defparam \Decoder0~88 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N5
maxii_lcell \cache_line_sdata[27] (
// Equation(s):
// cache_line_sdata[27] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~88_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~88_combout & ((cache_line_sdata[27]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[27]),
.datad(\Decoder0~88_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[27]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[27] .lut_mask = "1130";
defparam \cache_line_sdata[27] .operation_mode = "normal";
defparam \cache_line_sdata[27] .output_mode = "reg_only";
defparam \cache_line_sdata[27] .register_cascade_mode = "off";
defparam \cache_line_sdata[27] .sum_lutc_input = "datac";
defparam \cache_line_sdata[27] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N4
maxii_lcell \cache2_line_sdata[27] (
// Equation(s):
// cache2_line_sdata[27] = DFFEAS((cache_line_sdata[27] & (!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[27]),
.datab(\fault_flag[1][0]~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[27]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[27] .lut_mask = "0202";
defparam \cache2_line_sdata[27] .operation_mode = "normal";
defparam \cache2_line_sdata[27] .output_mode = "reg_only";
defparam \cache2_line_sdata[27] .register_cascade_mode = "off";
defparam \cache2_line_sdata[27] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[27] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N4
maxii_lcell \signal_high_voltage[27]~reg0 (
// Equation(s):
// \signal_high_voltage[27]~reg0_regout = DFFEAS((cache2_line_sdata[27] & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[27]),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[27]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[27]~reg0 .lut_mask = "0200";
defparam \signal_high_voltage[27]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[27]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[27]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[27]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[27]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N8
maxii_lcell \Decoder0~89 (
// Equation(s):
// \Decoder0~89_combout = (i[4] & (i[3] & (\Decoder0~70_combout & \Decoder0~115_combout )))
.clk(gnd),
.dataa(i[4]),
.datab(i[3]),
.datac(\Decoder0~70_combout ),
.datad(\Decoder0~115_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~89_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~89 .lut_mask = "8000";
defparam \Decoder0~89 .operation_mode = "normal";
defparam \Decoder0~89 .output_mode = "comb_only";
defparam \Decoder0~89 .register_cascade_mode = "off";
defparam \Decoder0~89 .sum_lutc_input = "datac";
defparam \Decoder0~89 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y6_N5
maxii_lcell \cache_line_sdata[28] (
// Equation(s):
// cache_line_sdata[28] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~89_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~89_combout & ((cache_line_sdata[28]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(\fiter_line_sdata~regout ),
.datac(cache_line_sdata[28]),
.datad(\Decoder0~89_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[28]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[28] .lut_mask = "1150";
defparam \cache_line_sdata[28] .operation_mode = "normal";
defparam \cache_line_sdata[28] .output_mode = "reg_only";
defparam \cache_line_sdata[28] .register_cascade_mode = "off";
defparam \cache_line_sdata[28] .sum_lutc_input = "datac";
defparam \cache_line_sdata[28] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y6_N0
maxii_lcell \cache2_line_sdata[28] (
// Equation(s):
// cache2_line_sdata[28] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[28])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[28]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[28]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[28] .lut_mask = "1100";
defparam \cache2_line_sdata[28] .operation_mode = "normal";
defparam \cache2_line_sdata[28] .output_mode = "reg_only";
defparam \cache2_line_sdata[28] .register_cascade_mode = "off";
defparam \cache2_line_sdata[28] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[28] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N5
maxii_lcell \signal_high_voltage[28]~reg0 (
// Equation(s):
// \signal_high_voltage[28]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[28] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[28]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[28]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[28]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[28]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[28]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[28]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[28]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[28]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N0
maxii_lcell \Decoder0~90 (
// Equation(s):
// \Decoder0~90_combout = (!i[1] & (i[2] & (\Decoder0~75_combout & \Decoder0~79_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(\Decoder0~75_combout ),
.datad(\Decoder0~79_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~90_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~90 .lut_mask = "4000";
defparam \Decoder0~90 .operation_mode = "normal";
defparam \Decoder0~90 .output_mode = "comb_only";
defparam \Decoder0~90 .register_cascade_mode = "off";
defparam \Decoder0~90 .sum_lutc_input = "datac";
defparam \Decoder0~90 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N1
maxii_lcell \cache_line_sdata[29] (
// Equation(s):
// cache_line_sdata[29] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~90_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~90_combout & (cache_line_sdata[29])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[29]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~90_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[29]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[29] .lut_mask = "0544";
defparam \cache_line_sdata[29] .operation_mode = "normal";
defparam \cache_line_sdata[29] .output_mode = "reg_only";
defparam \cache_line_sdata[29] .register_cascade_mode = "off";
defparam \cache_line_sdata[29] .sum_lutc_input = "datac";
defparam \cache_line_sdata[29] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N9
maxii_lcell \cache2_line_sdata[29] (
// Equation(s):
// cache2_line_sdata[29] = DFFEAS((cache_line_sdata[29] & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[29]),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[29]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[29] .lut_mask = "0202";
defparam \cache2_line_sdata[29] .operation_mode = "normal";
defparam \cache2_line_sdata[29] .output_mode = "reg_only";
defparam \cache2_line_sdata[29] .register_cascade_mode = "off";
defparam \cache2_line_sdata[29] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[29] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N1
maxii_lcell \signal_high_voltage[29]~reg0 (
// Equation(s):
// \signal_high_voltage[29]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[29] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[29]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[29]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[29]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[29]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[29]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[29]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[29]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[29]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N6
maxii_lcell \Decoder0~91 (
// Equation(s):
// \Decoder0~91_combout = (i[1] & (i[2] & (i[3] & \Decoder0~78_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~78_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~91_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~91 .lut_mask = "8000";
defparam \Decoder0~91 .operation_mode = "normal";
defparam \Decoder0~91 .output_mode = "comb_only";
defparam \Decoder0~91 .register_cascade_mode = "off";
defparam \Decoder0~91 .sum_lutc_input = "datac";
defparam \Decoder0~91 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y7_N7
maxii_lcell \cache_line_sdata[30] (
// Equation(s):
// cache_line_sdata[30] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~91_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~91_combout & ((cache_line_sdata[30]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[30]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~91_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[30]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[30] .lut_mask = "050c";
defparam \cache_line_sdata[30] .operation_mode = "normal";
defparam \cache_line_sdata[30] .output_mode = "reg_only";
defparam \cache_line_sdata[30] .register_cascade_mode = "off";
defparam \cache_line_sdata[30] .sum_lutc_input = "datac";
defparam \cache_line_sdata[30] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y8_N8
maxii_lcell \cache2_line_sdata[30] (
// Equation(s):
// cache2_line_sdata[30] = DFFEAS(((cache_line_sdata[30] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache_line_sdata[30]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[30]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[30] .lut_mask = "000c";
defparam \cache2_line_sdata[30] .operation_mode = "normal";
defparam \cache2_line_sdata[30] .output_mode = "reg_only";
defparam \cache2_line_sdata[30] .register_cascade_mode = "off";
defparam \cache2_line_sdata[30] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[30] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y9_N4
maxii_lcell \signal_high_voltage[30]~reg0 (
// Equation(s):
// \signal_high_voltage[30]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (\is_high_voltage_time~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[30]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[30]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[30]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[30]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[30]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[30]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[30]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[30]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[30]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N2
maxii_lcell \Decoder0~92 (
// Equation(s):
// \Decoder0~92_combout = (i[1] & (i[2] & (\Decoder0~75_combout & \Decoder0~79_combout )))
.clk(gnd),
.dataa(i[1]),
.datab(i[2]),
.datac(\Decoder0~75_combout ),
.datad(\Decoder0~79_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~92_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~92 .lut_mask = "8000";
defparam \Decoder0~92 .operation_mode = "normal";
defparam \Decoder0~92 .output_mode = "comb_only";
defparam \Decoder0~92 .register_cascade_mode = "off";
defparam \Decoder0~92 .sum_lutc_input = "datac";
defparam \Decoder0~92 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y9_N3
maxii_lcell \cache_line_sdata[31] (
// Equation(s):
// cache_line_sdata[31] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~92_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~92_combout & (cache_line_sdata[31])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[31]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~92_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[31]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[31] .lut_mask = "0544";
defparam \cache_line_sdata[31] .operation_mode = "normal";
defparam \cache_line_sdata[31] .output_mode = "reg_only";
defparam \cache_line_sdata[31] .register_cascade_mode = "off";
defparam \cache_line_sdata[31] .sum_lutc_input = "datac";
defparam \cache_line_sdata[31] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N0
maxii_lcell \cache2_line_sdata[31] (
// Equation(s):
// cache2_line_sdata[31] = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache_line_sdata[31]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[31]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[31]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[31] .lut_mask = "0300";
defparam \cache2_line_sdata[31] .operation_mode = "normal";
defparam \cache2_line_sdata[31] .output_mode = "reg_only";
defparam \cache2_line_sdata[31] .register_cascade_mode = "off";
defparam \cache2_line_sdata[31] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[31] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y9_N5
maxii_lcell \signal_high_voltage[31]~reg0 (
// Equation(s):
// \signal_high_voltage[31]~reg0_regout = DFFEAS((cache2_line_sdata[31] & (\is_high_voltage_time~regout & (!\fault_flag[1][0]~regout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[31]),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[31]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[31]~reg0 .lut_mask = "0008";
defparam \signal_high_voltage[31]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[31]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[31]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[31]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[31]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y10_N2
maxii_lcell \Decoder0~118 (
// Equation(s):
// \Decoder0~118_combout = (!i[0] & (i[5] & (\recv_complete~0_combout & \Decoder0~65 )))
.clk(gnd),
.dataa(i[0]),
.datab(i[5]),
.datac(\recv_complete~0_combout ),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~118_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~118 .lut_mask = "4000";
defparam \Decoder0~118 .operation_mode = "normal";
defparam \Decoder0~118 .output_mode = "comb_only";
defparam \Decoder0~118 .register_cascade_mode = "off";
defparam \Decoder0~118 .sum_lutc_input = "datac";
defparam \Decoder0~118 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y10_N3
maxii_lcell \cache_line_sdata[32] (
// Equation(s):
// cache_line_sdata[32] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~118_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~118_combout & (cache_line_sdata[32])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[32]),
.datab(\fiter_line_sdata~regout ),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~118_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[32]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[32] .lut_mask = "030a";
defparam \cache_line_sdata[32] .operation_mode = "normal";
defparam \cache_line_sdata[32] .output_mode = "reg_only";
defparam \cache_line_sdata[32] .register_cascade_mode = "off";
defparam \cache_line_sdata[32] .sum_lutc_input = "datac";
defparam \cache_line_sdata[32] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N7
maxii_lcell \cache2_line_sdata[32] (
// Equation(s):
// cache2_line_sdata[32] = DFFEAS((cache_line_sdata[32] & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[32]),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[32]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[32] .lut_mask = "0202";
defparam \cache2_line_sdata[32] .operation_mode = "normal";
defparam \cache2_line_sdata[32] .output_mode = "reg_only";
defparam \cache2_line_sdata[32] .register_cascade_mode = "off";
defparam \cache2_line_sdata[32] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[32] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N1
maxii_lcell \signal_high_voltage[32]~reg0 (
// Equation(s):
// \signal_high_voltage[32]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & (\is_high_voltage_time~regout & cache2_line_sdata[32]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(\is_high_voltage_time~regout ),
.datad(cache2_line_sdata[32]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[32]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[32]~reg0 .lut_mask = "1000";
defparam \signal_high_voltage[32]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[32]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[32]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[32]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[32]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y10_N8
maxii_lcell \Decoder0~93 (
// Equation(s):
// \Decoder0~93_combout = (i[0] & (i[5] & (\recv_complete~0_combout & \Decoder0~65 )))
.clk(gnd),
.dataa(i[0]),
.datab(i[5]),
.datac(\recv_complete~0_combout ),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~93_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~93 .lut_mask = "8000";
defparam \Decoder0~93 .operation_mode = "normal";
defparam \Decoder0~93 .output_mode = "comb_only";
defparam \Decoder0~93 .register_cascade_mode = "off";
defparam \Decoder0~93 .sum_lutc_input = "datac";
defparam \Decoder0~93 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y10_N9
maxii_lcell \cache_line_sdata[33] (
// Equation(s):
// cache_line_sdata[33] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~93_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~93_combout & (cache_line_sdata[33])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[33]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~93_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[33]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[33] .lut_mask = "0544";
defparam \cache_line_sdata[33] .operation_mode = "normal";
defparam \cache_line_sdata[33] .output_mode = "reg_only";
defparam \cache_line_sdata[33] .register_cascade_mode = "off";
defparam \cache_line_sdata[33] .sum_lutc_input = "datac";
defparam \cache_line_sdata[33] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N2
maxii_lcell \cache2_line_sdata[33] (
// Equation(s):
// cache2_line_sdata[33] = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache_line_sdata[33])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[33]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[33]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[33] .lut_mask = "0500";
defparam \cache2_line_sdata[33] .operation_mode = "normal";
defparam \cache2_line_sdata[33] .output_mode = "reg_only";
defparam \cache2_line_sdata[33] .register_cascade_mode = "off";
defparam \cache2_line_sdata[33] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[33] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N6
maxii_lcell \signal_high_voltage[33]~reg0 (
// Equation(s):
// \signal_high_voltage[33]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[33] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[33]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[33]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[33]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[33]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[33]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[33]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[33]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[33]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N6
maxii_lcell \Decoder0~119 (
// Equation(s):
// \Decoder0~119_combout = (!i[3] & (!i[2] & (\recv_complete~10_combout & \Decoder0~68_combout )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(\recv_complete~10_combout ),
.datad(\Decoder0~68_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~119_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~119 .lut_mask = "1000";
defparam \Decoder0~119 .operation_mode = "normal";
defparam \Decoder0~119 .output_mode = "comb_only";
defparam \Decoder0~119 .register_cascade_mode = "off";
defparam \Decoder0~119 .sum_lutc_input = "datac";
defparam \Decoder0~119 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N7
maxii_lcell \cache_line_sdata[34] (
// Equation(s):
// cache_line_sdata[34] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~119_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~119_combout & (cache_line_sdata[34])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[34]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~119_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[34]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[34] .lut_mask = "0544";
defparam \cache_line_sdata[34] .operation_mode = "normal";
defparam \cache_line_sdata[34] .output_mode = "reg_only";
defparam \cache_line_sdata[34] .register_cascade_mode = "off";
defparam \cache_line_sdata[34] .sum_lutc_input = "datac";
defparam \cache_line_sdata[34] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y8_N5
maxii_lcell \cache2_line_sdata[34] (
// Equation(s):
// cache2_line_sdata[34] = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache_line_sdata[34]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[34]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[34]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[34] .lut_mask = "0300";
defparam \cache2_line_sdata[34] .operation_mode = "normal";
defparam \cache2_line_sdata[34] .output_mode = "reg_only";
defparam \cache2_line_sdata[34] .register_cascade_mode = "off";
defparam \cache2_line_sdata[34] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[34] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N3
maxii_lcell \signal_high_voltage[34]~reg0 (
// Equation(s):
// \signal_high_voltage[34]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (\is_high_voltage_time~regout & (!\fault_flag[0][0]~regout & cache2_line_sdata[34]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[0][0]~regout ),
.datad(cache2_line_sdata[34]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[34]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[34]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[34]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[34]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[34]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[34]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[34]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N1
maxii_lcell \Decoder0~120 (
// Equation(s):
// \Decoder0~120_combout = (i[5] & (!i[3] & (!i[2] & \Decoder0~69_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[3]),
.datac(i[2]),
.datad(\Decoder0~69_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~120_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~120 .lut_mask = "0200";
defparam \Decoder0~120 .operation_mode = "normal";
defparam \Decoder0~120 .output_mode = "comb_only";
defparam \Decoder0~120 .register_cascade_mode = "off";
defparam \Decoder0~120 .sum_lutc_input = "datac";
defparam \Decoder0~120 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N0
maxii_lcell \cache_line_sdata[35] (
// Equation(s):
// cache_line_sdata[35] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~120_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~120_combout & ((cache_line_sdata[35]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[35]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~120_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[35]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[35] .lut_mask = "050c";
defparam \cache_line_sdata[35] .operation_mode = "normal";
defparam \cache_line_sdata[35] .output_mode = "reg_only";
defparam \cache_line_sdata[35] .register_cascade_mode = "off";
defparam \cache_line_sdata[35] .sum_lutc_input = "datac";
defparam \cache_line_sdata[35] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N2
maxii_lcell \cache2_line_sdata[35] (
// Equation(s):
// cache2_line_sdata[35] = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache_line_sdata[35]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[35]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[35]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[35] .lut_mask = "0300";
defparam \cache2_line_sdata[35] .operation_mode = "normal";
defparam \cache2_line_sdata[35] .output_mode = "reg_only";
defparam \cache2_line_sdata[35] .register_cascade_mode = "off";
defparam \cache2_line_sdata[35] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[35] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N3
maxii_lcell \signal_high_voltage[35]~reg0 (
// Equation(s):
// \signal_high_voltage[35]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[35] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[35]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[35]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[35]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[35]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[35]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[35]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[35]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[35]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N3
maxii_lcell \Decoder0~94 (
// Equation(s):
// \Decoder0~94_combout = (i[5] & (!i[0] & (!i[1])))
.clk(gnd),
.dataa(i[5]),
.datab(i[0]),
.datac(i[1]),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~94_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~94 .lut_mask = "0202";
defparam \Decoder0~94 .operation_mode = "normal";
defparam \Decoder0~94 .output_mode = "comb_only";
defparam \Decoder0~94 .register_cascade_mode = "off";
defparam \Decoder0~94 .sum_lutc_input = "datac";
defparam \Decoder0~94 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N8
maxii_lcell \Decoder0~95 (
// Equation(s):
// \Decoder0~95_combout = (!i[3] & (i[2] & (\Decoder0~94_combout & \Decoder0~65 )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(\Decoder0~94_combout ),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~95_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~95 .lut_mask = "4000";
defparam \Decoder0~95 .operation_mode = "normal";
defparam \Decoder0~95 .output_mode = "comb_only";
defparam \Decoder0~95 .register_cascade_mode = "off";
defparam \Decoder0~95 .sum_lutc_input = "datac";
defparam \Decoder0~95 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N9
maxii_lcell \cache_line_sdata[36] (
// Equation(s):
// cache_line_sdata[36] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~95_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~95_combout & ((cache_line_sdata[36]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[36]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~95_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[36]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[36] .lut_mask = "050c";
defparam \cache_line_sdata[36] .operation_mode = "normal";
defparam \cache_line_sdata[36] .output_mode = "reg_only";
defparam \cache_line_sdata[36] .register_cascade_mode = "off";
defparam \cache_line_sdata[36] .sum_lutc_input = "datac";
defparam \cache_line_sdata[36] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N6
maxii_lcell \cache2_line_sdata[36] (
// Equation(s):
// cache2_line_sdata[36] = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache_line_sdata[36]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[36]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[36]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[36] .lut_mask = "0300";
defparam \cache2_line_sdata[36] .operation_mode = "normal";
defparam \cache2_line_sdata[36] .output_mode = "reg_only";
defparam \cache2_line_sdata[36] .register_cascade_mode = "off";
defparam \cache2_line_sdata[36] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[36] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y5_N0
maxii_lcell \signal_high_voltage[36]~reg0 (
// Equation(s):
// \signal_high_voltage[36]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[36] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[36]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[36]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[36]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[36]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[36]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[36]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[36]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[36]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N2
maxii_lcell \Decoder0~121 (
// Equation(s):
// \Decoder0~121_combout = (!i[3] & (i[2] & (i[5] & \Decoder0~72_combout )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(i[5]),
.datad(\Decoder0~72_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~121_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~121 .lut_mask = "4000";
defparam \Decoder0~121 .operation_mode = "normal";
defparam \Decoder0~121 .output_mode = "comb_only";
defparam \Decoder0~121 .register_cascade_mode = "off";
defparam \Decoder0~121 .sum_lutc_input = "datac";
defparam \Decoder0~121 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N3
maxii_lcell \cache_line_sdata[37] (
// Equation(s):
// cache_line_sdata[37] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~121_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~121_combout & (cache_line_sdata[37])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[37]),
.datab(\fiter_line_sdata~regout ),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~121_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[37]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[37] .lut_mask = "030a";
defparam \cache_line_sdata[37] .operation_mode = "normal";
defparam \cache_line_sdata[37] .output_mode = "reg_only";
defparam \cache_line_sdata[37] .register_cascade_mode = "off";
defparam \cache_line_sdata[37] .sum_lutc_input = "datac";
defparam \cache_line_sdata[37] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N4
maxii_lcell \cache2_line_sdata[37] (
// Equation(s):
// cache2_line_sdata[37] = DFFEAS((cache_line_sdata[37] & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[37]),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[37]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[37] .lut_mask = "0202";
defparam \cache2_line_sdata[37] .operation_mode = "normal";
defparam \cache2_line_sdata[37] .output_mode = "reg_only";
defparam \cache2_line_sdata[37] .register_cascade_mode = "off";
defparam \cache2_line_sdata[37] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[37] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N5
maxii_lcell \signal_high_voltage[37]~reg0 (
// Equation(s):
// \signal_high_voltage[37]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (\is_high_voltage_time~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[37]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[37]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[37]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[37]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[37]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[37]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[37]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[37]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[37]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N5
maxii_lcell \Decoder0~122 (
// Equation(s):
// \Decoder0~122_combout = (!i[0] & (\Decoder0~73_combout & (i[5] & \Decoder0~68_combout )))
.clk(gnd),
.dataa(i[0]),
.datab(\Decoder0~73_combout ),
.datac(i[5]),
.datad(\Decoder0~68_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~122_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~122 .lut_mask = "4000";
defparam \Decoder0~122 .operation_mode = "normal";
defparam \Decoder0~122 .output_mode = "comb_only";
defparam \Decoder0~122 .register_cascade_mode = "off";
defparam \Decoder0~122 .sum_lutc_input = "datac";
defparam \Decoder0~122 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y9_N6
maxii_lcell \cache_line_sdata[38] (
// Equation(s):
// cache_line_sdata[38] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~122_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~122_combout & (cache_line_sdata[38])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[38]),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~122_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[38]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[38] .lut_mask = "0322";
defparam \cache_line_sdata[38] .operation_mode = "normal";
defparam \cache_line_sdata[38] .output_mode = "reg_only";
defparam \cache_line_sdata[38] .register_cascade_mode = "off";
defparam \cache_line_sdata[38] .sum_lutc_input = "datac";
defparam \cache_line_sdata[38] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N8
maxii_lcell \cache2_line_sdata[38] (
// Equation(s):
// cache2_line_sdata[38] = DFFEAS(((cache_line_sdata[38] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache_line_sdata[38]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[38]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[38] .lut_mask = "000c";
defparam \cache2_line_sdata[38] .operation_mode = "normal";
defparam \cache2_line_sdata[38] .output_mode = "reg_only";
defparam \cache2_line_sdata[38] .register_cascade_mode = "off";
defparam \cache2_line_sdata[38] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[38] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y9_N4
maxii_lcell \signal_high_voltage[38]~reg0 (
// Equation(s):
// \signal_high_voltage[38]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & (cache2_line_sdata[38] & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(cache2_line_sdata[38]),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[38]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[38]~reg0 .lut_mask = "1000";
defparam \signal_high_voltage[38]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[38]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[38]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[38]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[38]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y10_N6
maxii_lcell \Decoder0~123 (
// Equation(s):
// \Decoder0~123_combout = (!i[3] & (i[5] & (i[2] & \Decoder0~69_combout )))
.clk(gnd),
.dataa(i[3]),
.datab(i[5]),
.datac(i[2]),
.datad(\Decoder0~69_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~123_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~123 .lut_mask = "4000";
defparam \Decoder0~123 .operation_mode = "normal";
defparam \Decoder0~123 .output_mode = "comb_only";
defparam \Decoder0~123 .register_cascade_mode = "off";
defparam \Decoder0~123 .sum_lutc_input = "datac";
defparam \Decoder0~123 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y10_N7
maxii_lcell \cache_line_sdata[39] (
// Equation(s):
// cache_line_sdata[39] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~123_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~123_combout & ((cache_line_sdata[39]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(\fiter_line_sdata~regout ),
.datac(cache_line_sdata[39]),
.datad(\Decoder0~123_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[39]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[39] .lut_mask = "1150";
defparam \cache_line_sdata[39] .operation_mode = "normal";
defparam \cache_line_sdata[39] .output_mode = "reg_only";
defparam \cache_line_sdata[39] .register_cascade_mode = "off";
defparam \cache_line_sdata[39] .sum_lutc_input = "datac";
defparam \cache_line_sdata[39] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N2
maxii_lcell \cache2_line_sdata[39] (
// Equation(s):
// cache2_line_sdata[39] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[39])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[39]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[39]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[39] .lut_mask = "1100";
defparam \cache2_line_sdata[39] .operation_mode = "normal";
defparam \cache2_line_sdata[39] .output_mode = "reg_only";
defparam \cache2_line_sdata[39] .register_cascade_mode = "off";
defparam \cache2_line_sdata[39] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[39] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N9
maxii_lcell \signal_high_voltage[39]~reg0 (
// Equation(s):
// \signal_high_voltage[39]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & (\is_high_voltage_time~regout & cache2_line_sdata[39]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(\is_high_voltage_time~regout ),
.datad(cache2_line_sdata[39]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[39]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[39]~reg0 .lut_mask = "1000";
defparam \signal_high_voltage[39]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[39]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[39]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[39]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[39]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N1
maxii_lcell \Decoder0~96 (
// Equation(s):
// \Decoder0~96_combout = (i[3] & (!i[2] & (\Decoder0~94_combout & \Decoder0~65 )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(\Decoder0~94_combout ),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~96_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~96 .lut_mask = "2000";
defparam \Decoder0~96 .operation_mode = "normal";
defparam \Decoder0~96 .output_mode = "comb_only";
defparam \Decoder0~96 .register_cascade_mode = "off";
defparam \Decoder0~96 .sum_lutc_input = "datac";
defparam \Decoder0~96 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N2
maxii_lcell \cache_line_sdata[40] (
// Equation(s):
// cache_line_sdata[40] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~96_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~96_combout & ((cache_line_sdata[40]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(cache_line_sdata[40]),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~96_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[40]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[40] .lut_mask = "050c";
defparam \cache_line_sdata[40] .operation_mode = "normal";
defparam \cache_line_sdata[40] .output_mode = "reg_only";
defparam \cache_line_sdata[40] .register_cascade_mode = "off";
defparam \cache_line_sdata[40] .sum_lutc_input = "datac";
defparam \cache_line_sdata[40] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N7
maxii_lcell \cache2_line_sdata[40] (
// Equation(s):
// cache2_line_sdata[40] = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache_line_sdata[40]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[40]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[40]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[40] .lut_mask = "0300";
defparam \cache2_line_sdata[40] .operation_mode = "normal";
defparam \cache2_line_sdata[40] .output_mode = "reg_only";
defparam \cache2_line_sdata[40] .register_cascade_mode = "off";
defparam \cache2_line_sdata[40] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[40] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N6
maxii_lcell \signal_high_voltage[40]~reg0 (
// Equation(s):
// \signal_high_voltage[40]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[40] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[40]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[40]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[40]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[40]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[40]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[40]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[40]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[40]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N5
maxii_lcell \Decoder0~124 (
// Equation(s):
// \Decoder0~124_combout = (i[3] & (!i[2] & (i[5] & \Decoder0~72_combout )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(i[5]),
.datad(\Decoder0~72_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~124_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~124 .lut_mask = "2000";
defparam \Decoder0~124 .operation_mode = "normal";
defparam \Decoder0~124 .output_mode = "comb_only";
defparam \Decoder0~124 .register_cascade_mode = "off";
defparam \Decoder0~124 .sum_lutc_input = "datac";
defparam \Decoder0~124 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N6
maxii_lcell \cache_line_sdata[41] (
// Equation(s):
// cache_line_sdata[41] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~124_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~124_combout & (cache_line_sdata[41])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache_line_sdata[41]),
.datab(\fiter_line_sdata~regout ),
.datac(\cnt_for_high_voltage_time~128_combout ),
.datad(\Decoder0~124_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[41]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[41] .lut_mask = "030a";
defparam \cache_line_sdata[41] .operation_mode = "normal";
defparam \cache_line_sdata[41] .output_mode = "reg_only";
defparam \cache_line_sdata[41] .register_cascade_mode = "off";
defparam \cache_line_sdata[41] .sum_lutc_input = "datac";
defparam \cache_line_sdata[41] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y8_N8
maxii_lcell \cache2_line_sdata[41] (
// Equation(s):
// cache2_line_sdata[41] = DFFEAS((!\fault_flag[1][0]~regout & (((cache_line_sdata[41] & !\fault_flag[0][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(vcc),
.datac(cache_line_sdata[41]),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[41]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[41] .lut_mask = "0050";
defparam \cache2_line_sdata[41] .operation_mode = "normal";
defparam \cache2_line_sdata[41] .output_mode = "reg_only";
defparam \cache2_line_sdata[41] .register_cascade_mode = "off";
defparam \cache2_line_sdata[41] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[41] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N1
maxii_lcell \signal_high_voltage[41]~reg0 (
// Equation(s):
// \signal_high_voltage[41]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[41] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[41]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[41]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[41]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[41]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[41]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[41]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[41]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[41]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N5
maxii_lcell \Decoder0~125 (
// Equation(s):
// \Decoder0~125_combout = (i[5] & (!i[0] & (\Decoder0~74_combout & \Decoder0~68_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[0]),
.datac(\Decoder0~74_combout ),
.datad(\Decoder0~68_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~125_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~125 .lut_mask = "2000";
defparam \Decoder0~125 .operation_mode = "normal";
defparam \Decoder0~125 .output_mode = "comb_only";
defparam \Decoder0~125 .register_cascade_mode = "off";
defparam \Decoder0~125 .sum_lutc_input = "datac";
defparam \Decoder0~125 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y7_N6
maxii_lcell \cache_line_sdata[42] (
// Equation(s):
// cache_line_sdata[42] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~125_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~125_combout & ((cache_line_sdata[42]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[42]),
.datad(\Decoder0~125_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[42]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[42] .lut_mask = "1130";
defparam \cache_line_sdata[42] .operation_mode = "normal";
defparam \cache_line_sdata[42] .output_mode = "reg_only";
defparam \cache_line_sdata[42] .register_cascade_mode = "off";
defparam \cache_line_sdata[42] .sum_lutc_input = "datac";
defparam \cache_line_sdata[42] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y6_N9
maxii_lcell \cache2_line_sdata[42] (
// Equation(s):
// cache2_line_sdata[42] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[42])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[42]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[42]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[42] .lut_mask = "1100";
defparam \cache2_line_sdata[42] .operation_mode = "normal";
defparam \cache2_line_sdata[42] .output_mode = "reg_only";
defparam \cache2_line_sdata[42] .register_cascade_mode = "off";
defparam \cache2_line_sdata[42] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[42] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N4
maxii_lcell \signal_high_voltage[42]~reg0 (
// Equation(s):
// \signal_high_voltage[42]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[42] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[42]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[42]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[42]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[42]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[42]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[42]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[42]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[42]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N6
maxii_lcell \Decoder0~126 (
// Equation(s):
// \Decoder0~126_combout = (i[5] & (!i[2] & (i[3] & \Decoder0~69_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~69_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~126_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~126 .lut_mask = "2000";
defparam \Decoder0~126 .operation_mode = "normal";
defparam \Decoder0~126 .output_mode = "comb_only";
defparam \Decoder0~126 .register_cascade_mode = "off";
defparam \Decoder0~126 .sum_lutc_input = "datac";
defparam \Decoder0~126 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N7
maxii_lcell \cache_line_sdata[43] (
// Equation(s):
// cache_line_sdata[43] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~126_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~126_combout & ((cache_line_sdata[43]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[43]),
.datad(\Decoder0~126_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[43]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[43] .lut_mask = "1130";
defparam \cache_line_sdata[43] .operation_mode = "normal";
defparam \cache_line_sdata[43] .output_mode = "reg_only";
defparam \cache_line_sdata[43] .register_cascade_mode = "off";
defparam \cache_line_sdata[43] .sum_lutc_input = "datac";
defparam \cache_line_sdata[43] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N4
maxii_lcell \cache2_line_sdata[43] (
// Equation(s):
// cache2_line_sdata[43] = DFFEAS(((!\fault_flag[1][0]~regout & (cache_line_sdata[43] & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[1][0]~regout ),
.datac(cache_line_sdata[43]),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[43]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[43] .lut_mask = "0030";
defparam \cache2_line_sdata[43] .operation_mode = "normal";
defparam \cache2_line_sdata[43] .output_mode = "reg_only";
defparam \cache2_line_sdata[43] .register_cascade_mode = "off";
defparam \cache2_line_sdata[43] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[43] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N6
maxii_lcell \signal_high_voltage[43]~reg0 (
// Equation(s):
// \signal_high_voltage[43]~reg0_regout = DFFEAS((cache2_line_sdata[43] & (!\fault_flag[1][0]~regout & (\is_high_voltage_time~regout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[43]),
.datab(\fault_flag[1][0]~regout ),
.datac(\is_high_voltage_time~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[43]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[43]~reg0 .lut_mask = "0020";
defparam \signal_high_voltage[43]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[43]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[43]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[43]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[43]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N4
maxii_lcell \Decoder0~97 (
// Equation(s):
// \Decoder0~97_combout = (i[3] & (i[2] & (\Decoder0~94_combout & \Decoder0~65 )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(\Decoder0~94_combout ),
.datad(\Decoder0~65 ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~97_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~97 .lut_mask = "8000";
defparam \Decoder0~97 .operation_mode = "normal";
defparam \Decoder0~97 .output_mode = "comb_only";
defparam \Decoder0~97 .register_cascade_mode = "off";
defparam \Decoder0~97 .sum_lutc_input = "datac";
defparam \Decoder0~97 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y6_N5
maxii_lcell \cache_line_sdata[44] (
// Equation(s):
// cache_line_sdata[44] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~97_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~97_combout & ((cache_line_sdata[44]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[44]),
.datad(\Decoder0~97_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[44]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[44] .lut_mask = "1130";
defparam \cache_line_sdata[44] .operation_mode = "normal";
defparam \cache_line_sdata[44] .output_mode = "reg_only";
defparam \cache_line_sdata[44] .register_cascade_mode = "off";
defparam \cache_line_sdata[44] .sum_lutc_input = "datac";
defparam \cache_line_sdata[44] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y6_N4
maxii_lcell \cache2_line_sdata[44] (
// Equation(s):
// cache2_line_sdata[44] = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache_line_sdata[44])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache_line_sdata[44]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[44]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[44] .lut_mask = "1100";
defparam \cache2_line_sdata[44] .operation_mode = "normal";
defparam \cache2_line_sdata[44] .output_mode = "reg_only";
defparam \cache2_line_sdata[44] .register_cascade_mode = "off";
defparam \cache2_line_sdata[44] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[44] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N3
maxii_lcell \signal_high_voltage[44]~reg0 (
// Equation(s):
// \signal_high_voltage[44]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[44] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[44]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[44]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[44]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[44]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[44]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[44]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[44]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[44]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N3
maxii_lcell \Decoder0~98 (
// Equation(s):
// \Decoder0~98_combout = (i[5] & (i[2] & (i[3] & \Decoder0~72_combout )))
.clk(gnd),
.dataa(i[5]),
.datab(i[2]),
.datac(i[3]),
.datad(\Decoder0~72_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~98_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~98 .lut_mask = "8000";
defparam \Decoder0~98 .operation_mode = "normal";
defparam \Decoder0~98 .output_mode = "comb_only";
defparam \Decoder0~98 .register_cascade_mode = "off";
defparam \Decoder0~98 .sum_lutc_input = "datac";
defparam \Decoder0~98 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y10_N4
maxii_lcell \cache_line_sdata[45] (
// Equation(s):
// cache_line_sdata[45] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~98_combout & (!\fiter_line_sdata~regout )) # (!\Decoder0~98_combout & ((cache_line_sdata[45]))))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fiter_line_sdata~regout ),
.datab(\cnt_for_high_voltage_time~128_combout ),
.datac(cache_line_sdata[45]),
.datad(\Decoder0~98_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[45]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[45] .lut_mask = "1130";
defparam \cache_line_sdata[45] .operation_mode = "normal";
defparam \cache_line_sdata[45] .output_mode = "reg_only";
defparam \cache_line_sdata[45] .register_cascade_mode = "off";
defparam \cache_line_sdata[45] .sum_lutc_input = "datac";
defparam \cache_line_sdata[45] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N7
maxii_lcell \cache2_line_sdata[45] (
// Equation(s):
// cache2_line_sdata[45] = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache_line_sdata[45])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[45]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[45]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[45] .lut_mask = "0500";
defparam \cache2_line_sdata[45] .operation_mode = "normal";
defparam \cache2_line_sdata[45] .output_mode = "reg_only";
defparam \cache2_line_sdata[45] .register_cascade_mode = "off";
defparam \cache2_line_sdata[45] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[45] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N9
maxii_lcell \signal_high_voltage[45]~reg0 (
// Equation(s):
// \signal_high_voltage[45]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[45] & (!\fault_flag[0][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[45]),
.datac(\fault_flag[0][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[45]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[45]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[45]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[45]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[45]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[45]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[45]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N3
maxii_lcell \Decoder0~99 (
// Equation(s):
// \Decoder0~99_combout = (i[3] & (i[2] & (\Decoder0~68_combout & \recv_complete~10_combout )))
.clk(gnd),
.dataa(i[3]),
.datab(i[2]),
.datac(\Decoder0~68_combout ),
.datad(\recv_complete~10_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~99_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~99 .lut_mask = "8000";
defparam \Decoder0~99 .operation_mode = "normal";
defparam \Decoder0~99 .output_mode = "comb_only";
defparam \Decoder0~99 .register_cascade_mode = "off";
defparam \Decoder0~99 .sum_lutc_input = "datac";
defparam \Decoder0~99 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N2
maxii_lcell \cache_line_sdata[46] (
// Equation(s):
// cache_line_sdata[46] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~99_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~99_combout & (cache_line_sdata[46])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[46]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~99_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[46]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[46] .lut_mask = "0544";
defparam \cache_line_sdata[46] .operation_mode = "normal";
defparam \cache_line_sdata[46] .output_mode = "reg_only";
defparam \cache_line_sdata[46] .register_cascade_mode = "off";
defparam \cache_line_sdata[46] .sum_lutc_input = "datac";
defparam \cache_line_sdata[46] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y8_N0
maxii_lcell \cache2_line_sdata[46] (
// Equation(s):
// cache2_line_sdata[46] = DFFEAS(((cache_line_sdata[46] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache_line_sdata[46]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[46]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[46] .lut_mask = "000c";
defparam \cache2_line_sdata[46] .operation_mode = "normal";
defparam \cache2_line_sdata[46] .output_mode = "reg_only";
defparam \cache2_line_sdata[46] .register_cascade_mode = "off";
defparam \cache2_line_sdata[46] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[46] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N7
maxii_lcell \signal_high_voltage[46]~reg0 (
// Equation(s):
// \signal_high_voltage[46]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (\is_high_voltage_time~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[46]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\is_high_voltage_time~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[46]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[46]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[46]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[46]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[46]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[46]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[46]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[46]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y10_N1
maxii_lcell \Decoder0~100 (
// Equation(s):
// \Decoder0~100_combout = (i[2] & (i[5] & (i[3] & \Decoder0~69_combout )))
.clk(gnd),
.dataa(i[2]),
.datab(i[5]),
.datac(i[3]),
.datad(\Decoder0~69_combout ),
.aclr(gnd),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(\Decoder0~100_combout ),
.regout(),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \Decoder0~100 .lut_mask = "8000";
defparam \Decoder0~100 .operation_mode = "normal";
defparam \Decoder0~100 .output_mode = "comb_only";
defparam \Decoder0~100 .register_cascade_mode = "off";
defparam \Decoder0~100 .sum_lutc_input = "datac";
defparam \Decoder0~100 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y10_N9
maxii_lcell \cache_line_sdata[47] (
// Equation(s):
// cache_line_sdata[47] = DFFEAS((!\cnt_for_high_voltage_time~128_combout & ((\Decoder0~100_combout & ((!\fiter_line_sdata~regout ))) # (!\Decoder0~100_combout & (cache_line_sdata[47])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\cnt_for_high_voltage_time~128_combout ),
.datab(cache_line_sdata[47]),
.datac(\fiter_line_sdata~regout ),
.datad(\Decoder0~100_combout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache_line_sdata[47]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache_line_sdata[47] .lut_mask = "0544";
defparam \cache_line_sdata[47] .operation_mode = "normal";
defparam \cache_line_sdata[47] .output_mode = "reg_only";
defparam \cache_line_sdata[47] .register_cascade_mode = "off";
defparam \cache_line_sdata[47] .sum_lutc_input = "datac";
defparam \cache_line_sdata[47] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y7_N7
maxii_lcell \cache2_line_sdata[47] (
// Equation(s):
// cache2_line_sdata[47] = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache_line_sdata[47])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , \cache2_line_sdata[45]~50_combout , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache_line_sdata[47]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(\cache2_line_sdata[45]~50_combout ),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(cache2_line_sdata[47]),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \cache2_line_sdata[47] .lut_mask = "0500";
defparam \cache2_line_sdata[47] .operation_mode = "normal";
defparam \cache2_line_sdata[47] .output_mode = "reg_only";
defparam \cache2_line_sdata[47] .register_cascade_mode = "off";
defparam \cache2_line_sdata[47] .sum_lutc_input = "datac";
defparam \cache2_line_sdata[47] .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N9
maxii_lcell \signal_high_voltage[47]~reg0 (
// Equation(s):
// \signal_high_voltage[47]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[47] & (!\fault_flag[1][0]~regout & \is_high_voltage_time~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[47]),
.datac(\fault_flag[1][0]~regout ),
.datad(\is_high_voltage_time~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_high_voltage[47]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_high_voltage[47]~reg0 .lut_mask = "0400";
defparam \signal_high_voltage[47]~reg0 .operation_mode = "normal";
defparam \signal_high_voltage[47]~reg0 .output_mode = "reg_only";
defparam \signal_high_voltage[47]~reg0 .register_cascade_mode = "off";
defparam \signal_high_voltage[47]~reg0 .sum_lutc_input = "datac";
defparam \signal_high_voltage[47]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y5_N6
maxii_lcell \signal_low_voltage[0]~reg0 (
// Equation(s):
// \signal_low_voltage[0]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (((!\fault_flag[0][0]~regout & cache2_line_sdata[0])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(cache2_line_sdata[0]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[0]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[0]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[0]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[0]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[0]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[0]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[0]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N6
maxii_lcell \signal_low_voltage[1]~reg0 (
// Equation(s):
// \signal_low_voltage[1]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[1]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[1]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[1]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[1]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[1]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[1]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[1]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[1]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[1]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N5
maxii_lcell \signal_low_voltage[2]~reg0 (
// Equation(s):
// \signal_low_voltage[2]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[2] & (!\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[2]),
.datac(\fault_flag[0][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[2]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[2]~reg0 .lut_mask = "0404";
defparam \signal_low_voltage[2]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[2]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[2]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[2]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[2]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y5_N6
maxii_lcell \signal_low_voltage[3]~reg0 (
// Equation(s):
// \signal_low_voltage[3]~reg0_regout = DFFEAS(((cache2_line_sdata[3] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache2_line_sdata[3]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[3]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[3]~reg0 .lut_mask = "000c";
defparam \signal_low_voltage[3]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[3]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[3]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[3]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[3]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y5_N9
maxii_lcell \signal_low_voltage[4]~reg0 (
// Equation(s):
// \signal_low_voltage[4]~reg0_regout = DFFEAS((cache2_line_sdata[4] & (((!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout )))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[4]),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[4]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[4]~reg0 .lut_mask = "000a";
defparam \signal_low_voltage[4]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[4]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[4]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[4]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[4]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N6
maxii_lcell \signal_low_voltage[5]~reg0 (
// Equation(s):
// \signal_low_voltage[5]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[5] & (!\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[5]),
.datac(\fault_flag[0][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[5]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[5]~reg0 .lut_mask = "0404";
defparam \signal_low_voltage[5]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[5]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[5]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[5]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[5]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N1
maxii_lcell \signal_low_voltage[6]~reg0 (
// Equation(s):
// \signal_low_voltage[6]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (cache2_line_sdata[6] & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(cache2_line_sdata[6]),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[6]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[6]~reg0 .lut_mask = "0030";
defparam \signal_low_voltage[6]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[6]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[6]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[6]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[6]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y4_N9
maxii_lcell \signal_low_voltage[7]~reg0 (
// Equation(s):
// \signal_low_voltage[7]~reg0_regout = DFFEAS(((cache2_line_sdata[7] & (!\fault_flag[1][0]~regout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache2_line_sdata[7]),
.datac(\fault_flag[1][0]~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[7]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[7]~reg0 .lut_mask = "000c";
defparam \signal_low_voltage[7]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[7]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[7]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[7]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[7]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y5_N5
maxii_lcell \signal_low_voltage[8]~reg0 (
// Equation(s):
// \signal_low_voltage[8]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (((!\fault_flag[0][0]~regout & cache2_line_sdata[8])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(cache2_line_sdata[8]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[8]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[8]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[8]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[8]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[8]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[8]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[8]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y4_N5
maxii_lcell \signal_low_voltage[9]~reg0 (
// Equation(s):
// \signal_low_voltage[9]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[9]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[9]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[9]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[9]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[9]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[9]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[9]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[9]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[9]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N7
maxii_lcell \signal_low_voltage[10]~reg0 (
// Equation(s):
// \signal_low_voltage[10]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[10]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[10]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[10]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[10]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[10]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[10]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[10]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[10]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[10]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y4_N8
maxii_lcell \signal_low_voltage[11]~reg0 (
// Equation(s):
// \signal_low_voltage[11]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[11]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[11]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[11]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[11]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[11]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[11]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[11]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[11]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[11]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y5_N9
maxii_lcell \signal_low_voltage[12]~reg0 (
// Equation(s):
// \signal_low_voltage[12]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (((!\fault_flag[0][0]~regout & cache2_line_sdata[12])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(cache2_line_sdata[12]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[12]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[12]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[12]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[12]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[12]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[12]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[12]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y4_N4
maxii_lcell \signal_low_voltage[13]~reg0 (
// Equation(s):
// \signal_low_voltage[13]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[13]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[13]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[13]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[13]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[13]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[13]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[13]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[13]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[13]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y4_N8
maxii_lcell \signal_low_voltage[14]~reg0 (
// Equation(s):
// \signal_low_voltage[14]~reg0_regout = DFFEAS(((cache2_line_sdata[14] & (!\fault_flag[1][0]~regout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache2_line_sdata[14]),
.datac(\fault_flag[1][0]~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[14]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[14]~reg0 .lut_mask = "000c";
defparam \signal_low_voltage[14]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[14]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[14]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[14]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[14]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N5
maxii_lcell \signal_low_voltage[15]~reg0 (
// Equation(s):
// \signal_low_voltage[15]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[15]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[15]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[15]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[15]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[15]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[15]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[15]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[15]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[15]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N8
maxii_lcell \signal_low_voltage[16]~reg0 (
// Equation(s):
// \signal_low_voltage[16]~reg0_regout = DFFEAS((cache2_line_sdata[16] & (!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(cache2_line_sdata[16]),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[16]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[16]~reg0 .lut_mask = "0202";
defparam \signal_low_voltage[16]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[16]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[16]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[16]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[16]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N8
maxii_lcell \signal_low_voltage[17]~reg0 (
// Equation(s):
// \signal_low_voltage[17]~reg0_regout = DFFEAS(((cache2_line_sdata[17] & (!\fault_flag[1][0]~regout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache2_line_sdata[17]),
.datac(\fault_flag[1][0]~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[17]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[17]~reg0 .lut_mask = "000c";
defparam \signal_low_voltage[17]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[17]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[17]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[17]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[17]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N9
maxii_lcell \signal_low_voltage[18]~reg0 (
// Equation(s):
// \signal_low_voltage[18]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[18]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[18]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[18]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[18]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[18]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[18]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[18]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[18]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[18]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X9_Y5_N0
maxii_lcell \signal_low_voltage[19]~reg0 (
// Equation(s):
// \signal_low_voltage[19]~reg0_regout = DFFEAS(((cache2_line_sdata[19] & (!\fault_flag[0][0]~regout & !\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache2_line_sdata[19]),
.datac(\fault_flag[0][0]~regout ),
.datad(\fault_flag[1][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[19]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[19]~reg0 .lut_mask = "000c";
defparam \signal_low_voltage[19]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[19]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[19]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[19]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[19]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N6
maxii_lcell \signal_low_voltage[20]~reg0 (
// Equation(s):
// \signal_low_voltage[20]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((cache2_line_sdata[20])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(vcc),
.datad(cache2_line_sdata[20]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[20]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[20]~reg0 .lut_mask = "1100";
defparam \signal_low_voltage[20]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[20]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[20]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[20]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[20]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y6_N3
maxii_lcell \signal_low_voltage[21]~reg0 (
// Equation(s):
// \signal_low_voltage[21]~reg0_regout = DFFEAS(((cache2_line_sdata[21] & (!\fault_flag[1][0]~regout & !\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(cache2_line_sdata[21]),
.datac(\fault_flag[1][0]~regout ),
.datad(\fault_flag[0][0]~regout ),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[21]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[21]~reg0 .lut_mask = "000c";
defparam \signal_low_voltage[21]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[21]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[21]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[21]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[21]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N6
maxii_lcell \signal_low_voltage[22]~reg0 (
// Equation(s):
// \signal_low_voltage[22]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[22]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[22]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[22]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[22]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[22]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[22]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[22]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[22]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[22]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y9_N6
maxii_lcell \signal_low_voltage[23]~reg0 (
// Equation(s):
// \signal_low_voltage[23]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[23])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[23]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[23]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[23]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[23]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[23]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[23]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[23]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[23]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y9_N4
maxii_lcell \signal_low_voltage[24]~reg0 (
// Equation(s):
// \signal_low_voltage[24]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[24])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[24]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[24]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[24]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[24]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[24]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[24]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[24]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[24]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y9_N8
maxii_lcell \signal_low_voltage[25]~reg0 (
// Equation(s):
// \signal_low_voltage[25]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[25])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[25]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[25]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[25]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[25]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[25]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[25]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[25]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[25]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y8_N0
maxii_lcell \signal_low_voltage[26]~reg0 (
// Equation(s):
// \signal_low_voltage[26]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (!\fault_flag[0][0]~regout & ((cache2_line_sdata[26])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(\fault_flag[0][0]~regout ),
.datac(vcc),
.datad(cache2_line_sdata[26]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[26]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[26]~reg0 .lut_mask = "1100";
defparam \signal_low_voltage[26]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[26]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[26]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[26]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[26]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X13_Y8_N2
maxii_lcell \signal_low_voltage[27]~reg0 (
// Equation(s):
// \signal_low_voltage[27]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[27]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[27]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[27]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[27]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[27]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[27]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[27]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[27]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[27]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N4
maxii_lcell \signal_low_voltage[28]~reg0 (
// Equation(s):
// \signal_low_voltage[28]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[28] & (!\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[28]),
.datac(\fault_flag[0][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[28]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[28]~reg0 .lut_mask = "0404";
defparam \signal_low_voltage[28]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[28]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[28]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[28]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[28]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N5
maxii_lcell \signal_low_voltage[29]~reg0 (
// Equation(s):
// \signal_low_voltage[29]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[29] & (!\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[29]),
.datac(\fault_flag[0][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[29]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[29]~reg0 .lut_mask = "0404";
defparam \signal_low_voltage[29]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[29]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[29]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[29]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[29]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y9_N2
maxii_lcell \signal_low_voltage[30]~reg0 (
// Equation(s):
// \signal_low_voltage[30]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[30]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[30]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[30]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[30]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[30]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[30]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[30]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[30]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[30]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X11_Y9_N6
maxii_lcell \signal_low_voltage[31]~reg0 (
// Equation(s):
// \signal_low_voltage[31]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[31]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[31]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[31]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[31]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[31]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[31]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[31]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[31]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[31]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N7
maxii_lcell \signal_low_voltage[32]~reg0 (
// Equation(s):
// \signal_low_voltage[32]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache2_line_sdata[32])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache2_line_sdata[32]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[32]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[32]~reg0 .lut_mask = "1100";
defparam \signal_low_voltage[32]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[32]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[32]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[32]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[32]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N3
maxii_lcell \signal_low_voltage[33]~reg0 (
// Equation(s):
// \signal_low_voltage[33]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (cache2_line_sdata[33] & (!\fault_flag[1][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(cache2_line_sdata[33]),
.datac(\fault_flag[1][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[33]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[33]~reg0 .lut_mask = "0404";
defparam \signal_low_voltage[33]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[33]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[33]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[33]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[33]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X12_Y7_N2
maxii_lcell \signal_low_voltage[34]~reg0 (
// Equation(s):
// \signal_low_voltage[34]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[34]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[34]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[34]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[34]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[34]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[34]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[34]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[34]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[34]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N4
maxii_lcell \signal_low_voltage[35]~reg0 (
// Equation(s):
// \signal_low_voltage[35]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (cache2_line_sdata[35] & (!\fault_flag[0][0]~regout ))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(cache2_line_sdata[35]),
.datac(\fault_flag[0][0]~regout ),
.datad(vcc),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[35]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[35]~reg0 .lut_mask = "0404";
defparam \signal_low_voltage[35]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[35]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[35]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[35]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[35]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X8_Y5_N2
maxii_lcell \signal_low_voltage[36]~reg0 (
// Equation(s):
// \signal_low_voltage[36]~reg0_regout = DFFEAS((!\fault_flag[1][0]~regout & (((!\fault_flag[0][0]~regout & cache2_line_sdata[36])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[1][0]~regout ),
.datab(vcc),
.datac(\fault_flag[0][0]~regout ),
.datad(cache2_line_sdata[36]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[36]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[36]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[36]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[36]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[36]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[36]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[36]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N4
maxii_lcell \signal_low_voltage[37]~reg0 (
// Equation(s):
// \signal_low_voltage[37]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[37])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[37]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[37]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[37]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[37]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[37]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[37]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[37]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[37]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y9_N2
maxii_lcell \signal_low_voltage[38]~reg0 (
// Equation(s):
// \signal_low_voltage[38]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[38]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[38]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[38]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[38]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[38]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[38]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[38]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[38]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[38]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X10_Y9_N8
maxii_lcell \signal_low_voltage[39]~reg0 (
// Equation(s):
// \signal_low_voltage[39]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache2_line_sdata[39])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache2_line_sdata[39]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[39]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[39]~reg0 .lut_mask = "1100";
defparam \signal_low_voltage[39]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[39]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[39]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[39]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[39]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N4
maxii_lcell \signal_low_voltage[40]~reg0 (
// Equation(s):
// \signal_low_voltage[40]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[40])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[40]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[40]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[40]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[40]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[40]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[40]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[40]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[40]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y8_N8
maxii_lcell \signal_low_voltage[41]~reg0 (
// Equation(s):
// \signal_low_voltage[41]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[41])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[41]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[41]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[41]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[41]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[41]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[41]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[41]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[41]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X7_Y6_N2
maxii_lcell \signal_low_voltage[42]~reg0 (
// Equation(s):
// \signal_low_voltage[42]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[42]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[42]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[42]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[42]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[42]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[42]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[42]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[42]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[42]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X5_Y8_N7
maxii_lcell \signal_low_voltage[43]~reg0 (
// Equation(s):
// \signal_low_voltage[43]~reg0_regout = DFFEAS(((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & cache2_line_sdata[43]))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(vcc),
.datab(\fault_flag[0][0]~regout ),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[43]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[43]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[43]~reg0 .lut_mask = "0300";
defparam \signal_low_voltage[43]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[43]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[43]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[43]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[43]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N1
maxii_lcell \signal_low_voltage[44]~reg0 (
// Equation(s):
// \signal_low_voltage[44]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[44])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[44]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[44]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[44]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[44]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[44]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[44]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[44]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[44]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N2
maxii_lcell \signal_low_voltage[45]~reg0 (
// Equation(s):
// \signal_low_voltage[45]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (!\fault_flag[1][0]~regout & ((cache2_line_sdata[45])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(\fault_flag[1][0]~regout ),
.datac(vcc),
.datad(cache2_line_sdata[45]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[45]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[45]~reg0 .lut_mask = "1100";
defparam \signal_low_voltage[45]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[45]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[45]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[45]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[45]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N5
maxii_lcell \signal_low_voltage[46]~reg0 (
// Equation(s):
// \signal_low_voltage[46]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[46])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[46]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[46]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[46]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[46]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[46]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[46]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[46]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[46]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: LC_X6_Y6_N8
maxii_lcell \signal_low_voltage[47]~reg0 (
// Equation(s):
// \signal_low_voltage[47]~reg0_regout = DFFEAS((!\fault_flag[0][0]~regout & (((!\fault_flag[1][0]~regout & cache2_line_sdata[47])))), GLOBAL(\sys_clk~combout ), GLOBAL(\rst_n~combout ), , , , , , )
.clk(\sys_clk~combout ),
.dataa(\fault_flag[0][0]~regout ),
.datab(vcc),
.datac(\fault_flag[1][0]~regout ),
.datad(cache2_line_sdata[47]),
.aclr(!\rst_n~combout ),
.aload(gnd),
.sclr(gnd),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\signal_low_voltage[47]~reg0_regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \signal_low_voltage[47]~reg0 .lut_mask = "0500";
defparam \signal_low_voltage[47]~reg0 .operation_mode = "normal";
defparam \signal_low_voltage[47]~reg0 .output_mode = "reg_only";
defparam \signal_low_voltage[47]~reg0 .register_cascade_mode = "off";
defparam \signal_low_voltage[47]~reg0 .sum_lutc_input = "datac";
defparam \signal_low_voltage[47]~reg0 .synch_mode = "off";
// synopsys translate_on
// Location: PIN_43, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[0]~I (
.datain(!\signal_high_voltage[0]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[0]));
// synopsys translate_off
defparam \signal_high_voltage[0]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_44, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[1]~I (
.datain(!\signal_high_voltage[1]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[1]));
// synopsys translate_off
defparam \signal_high_voltage[1]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_45, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[2]~I (
.datain(!\signal_high_voltage[2]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[2]));
// synopsys translate_off
defparam \signal_high_voltage[2]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_48, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[3]~I (
.datain(!\signal_high_voltage[3]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[3]));
// synopsys translate_off
defparam \signal_high_voltage[3]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_53, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[4]~I (
.datain(!\signal_high_voltage[4]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[4]));
// synopsys translate_off
defparam \signal_high_voltage[4]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_55, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[5]~I (
.datain(!\signal_high_voltage[5]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[5]));
// synopsys translate_off
defparam \signal_high_voltage[5]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_57, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[6]~I (
.datain(!\signal_high_voltage[6]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[6]));
// synopsys translate_off
defparam \signal_high_voltage[6]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_58, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[7]~I (
.datain(!\signal_high_voltage[7]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[7]));
// synopsys translate_off
defparam \signal_high_voltage[7]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_63, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[8]~I (
.datain(!\signal_high_voltage[8]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[8]));
// synopsys translate_off
defparam \signal_high_voltage[8]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_66, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[9]~I (
.datain(!\signal_high_voltage[9]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[9]));
// synopsys translate_off
defparam \signal_high_voltage[9]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_67, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[10]~I (
.datain(!\signal_high_voltage[10]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[10]));
// synopsys translate_off
defparam \signal_high_voltage[10]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_68, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[11]~I (
.datain(!\signal_high_voltage[11]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[11]));
// synopsys translate_off
defparam \signal_high_voltage[11]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_73, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[12]~I (
.datain(!\signal_high_voltage[12]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[12]));
// synopsys translate_off
defparam \signal_high_voltage[12]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_74, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[13]~I (
.datain(!\signal_high_voltage[13]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[13]));
// synopsys translate_off
defparam \signal_high_voltage[13]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_75, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[14]~I (
.datain(!\signal_high_voltage[14]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[14]));
// synopsys translate_off
defparam \signal_high_voltage[14]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_76, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[15]~I (
.datain(!\signal_high_voltage[15]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[15]));
// synopsys translate_off
defparam \signal_high_voltage[15]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_81, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[16]~I (
.datain(!\signal_high_voltage[16]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[16]));
// synopsys translate_off
defparam \signal_high_voltage[16]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_84, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[17]~I (
.datain(!\signal_high_voltage[17]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[17]));
// synopsys translate_off
defparam \signal_high_voltage[17]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_85, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[18]~I (
.datain(!\signal_high_voltage[18]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[18]));
// synopsys translate_off
defparam \signal_high_voltage[18]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_86, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[19]~I (
.datain(!\signal_high_voltage[19]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[19]));
// synopsys translate_off
defparam \signal_high_voltage[19]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_93, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[20]~I (
.datain(!\signal_high_voltage[20]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[20]));
// synopsys translate_off
defparam \signal_high_voltage[20]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_94, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[21]~I (
.datain(!\signal_high_voltage[21]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[21]));
// synopsys translate_off
defparam \signal_high_voltage[21]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_95, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[22]~I (
.datain(!\signal_high_voltage[22]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[22]));
// synopsys translate_off
defparam \signal_high_voltage[22]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_96, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[23]~I (
.datain(!\signal_high_voltage[23]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[23]));
// synopsys translate_off
defparam \signal_high_voltage[23]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_103, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[24]~I (
.datain(!\signal_high_voltage[24]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[24]));
// synopsys translate_off
defparam \signal_high_voltage[24]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_104, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[25]~I (
.datain(!\signal_high_voltage[25]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[25]));
// synopsys translate_off
defparam \signal_high_voltage[25]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_105, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[26]~I (
.datain(!\signal_high_voltage[26]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[26]));
// synopsys translate_off
defparam \signal_high_voltage[26]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_106, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[27]~I (
.datain(!\signal_high_voltage[27]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[27]));
// synopsys translate_off
defparam \signal_high_voltage[27]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_113, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[28]~I (
.datain(!\signal_high_voltage[28]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[28]));
// synopsys translate_off
defparam \signal_high_voltage[28]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_114, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[29]~I (
.datain(!\signal_high_voltage[29]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[29]));
// synopsys translate_off
defparam \signal_high_voltage[29]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_117, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[30]~I (
.datain(!\signal_high_voltage[30]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[30]));
// synopsys translate_off
defparam \signal_high_voltage[30]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_118, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[31]~I (
.datain(!\signal_high_voltage[31]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[31]));
// synopsys translate_off
defparam \signal_high_voltage[31]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_123, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[32]~I (
.datain(!\signal_high_voltage[32]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[32]));
// synopsys translate_off
defparam \signal_high_voltage[32]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_124, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[33]~I (
.datain(!\signal_high_voltage[33]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[33]));
// synopsys translate_off
defparam \signal_high_voltage[33]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_125, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[34]~I (
.datain(!\signal_high_voltage[34]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[34]));
// synopsys translate_off
defparam \signal_high_voltage[34]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_127, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[35]~I (
.datain(!\signal_high_voltage[35]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[35]));
// synopsys translate_off
defparam \signal_high_voltage[35]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_133, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[36]~I (
.datain(!\signal_high_voltage[36]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[36]));
// synopsys translate_off
defparam \signal_high_voltage[36]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_134, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[37]~I (
.datain(!\signal_high_voltage[37]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[37]));
// synopsys translate_off
defparam \signal_high_voltage[37]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_137, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[38]~I (
.datain(!\signal_high_voltage[38]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[38]));
// synopsys translate_off
defparam \signal_high_voltage[38]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_138, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[39]~I (
.datain(!\signal_high_voltage[39]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[39]));
// synopsys translate_off
defparam \signal_high_voltage[39]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_1, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[40]~I (
.datain(!\signal_high_voltage[40]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[40]));
// synopsys translate_off
defparam \signal_high_voltage[40]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_2, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[41]~I (
.datain(!\signal_high_voltage[41]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[41]));
// synopsys translate_off
defparam \signal_high_voltage[41]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_3, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[42]~I (
.datain(!\signal_high_voltage[42]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[42]));
// synopsys translate_off
defparam \signal_high_voltage[42]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_4, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[43]~I (
.datain(!\signal_high_voltage[43]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[43]));
// synopsys translate_off
defparam \signal_high_voltage[43]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_12, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[44]~I (
.datain(!\signal_high_voltage[44]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[44]));
// synopsys translate_off
defparam \signal_high_voltage[44]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_13, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[45]~I (
.datain(!\signal_high_voltage[45]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[45]));
// synopsys translate_off
defparam \signal_high_voltage[45]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_14, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[46]~I (
.datain(!\signal_high_voltage[46]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[46]));
// synopsys translate_off
defparam \signal_high_voltage[46]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_15, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_high_voltage[47]~I (
.datain(!\signal_high_voltage[47]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_high_voltage[47]));
// synopsys translate_off
defparam \signal_high_voltage[47]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_49, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[0]~I (
.datain(!\signal_low_voltage[0]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[0]));
// synopsys translate_off
defparam \signal_low_voltage[0]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_50, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[1]~I (
.datain(!\signal_low_voltage[1]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[1]));
// synopsys translate_off
defparam \signal_low_voltage[1]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_51, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[2]~I (
.datain(!\signal_low_voltage[2]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[2]));
// synopsys translate_off
defparam \signal_low_voltage[2]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_52, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[3]~I (
.datain(!\signal_low_voltage[3]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[3]));
// synopsys translate_off
defparam \signal_low_voltage[3]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_59, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[4]~I (
.datain(!\signal_low_voltage[4]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[4]));
// synopsys translate_off
defparam \signal_low_voltage[4]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_60, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[5]~I (
.datain(!\signal_low_voltage[5]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[5]));
// synopsys translate_off
defparam \signal_low_voltage[5]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_61, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[6]~I (
.datain(!\signal_low_voltage[6]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[6]));
// synopsys translate_off
defparam \signal_low_voltage[6]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_62, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[7]~I (
.datain(!\signal_low_voltage[7]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[7]));
// synopsys translate_off
defparam \signal_low_voltage[7]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_69, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[8]~I (
.datain(!\signal_low_voltage[8]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[8]));
// synopsys translate_off
defparam \signal_low_voltage[8]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_70, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[9]~I (
.datain(!\signal_low_voltage[9]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[9]));
// synopsys translate_off
defparam \signal_low_voltage[9]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_71, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[10]~I (
.datain(!\signal_low_voltage[10]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[10]));
// synopsys translate_off
defparam \signal_low_voltage[10]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_72, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[11]~I (
.datain(!\signal_low_voltage[11]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[11]));
// synopsys translate_off
defparam \signal_low_voltage[11]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_77, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[12]~I (
.datain(!\signal_low_voltage[12]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[12]));
// synopsys translate_off
defparam \signal_low_voltage[12]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_78, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[13]~I (
.datain(!\signal_low_voltage[13]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[13]));
// synopsys translate_off
defparam \signal_low_voltage[13]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_79, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[14]~I (
.datain(!\signal_low_voltage[14]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[14]));
// synopsys translate_off
defparam \signal_low_voltage[14]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_80, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[15]~I (
.datain(!\signal_low_voltage[15]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[15]));
// synopsys translate_off
defparam \signal_low_voltage[15]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_87, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[16]~I (
.datain(!\signal_low_voltage[16]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[16]));
// synopsys translate_off
defparam \signal_low_voltage[16]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_88, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[17]~I (
.datain(!\signal_low_voltage[17]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[17]));
// synopsys translate_off
defparam \signal_low_voltage[17]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_89, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[18]~I (
.datain(!\signal_low_voltage[18]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[18]));
// synopsys translate_off
defparam \signal_low_voltage[18]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_91, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[19]~I (
.datain(!\signal_low_voltage[19]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[19]));
// synopsys translate_off
defparam \signal_low_voltage[19]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_97, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[20]~I (
.datain(!\signal_low_voltage[20]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[20]));
// synopsys translate_off
defparam \signal_low_voltage[20]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_98, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[21]~I (
.datain(!\signal_low_voltage[21]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[21]));
// synopsys translate_off
defparam \signal_low_voltage[21]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_101, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[22]~I (
.datain(!\signal_low_voltage[22]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[22]));
// synopsys translate_off
defparam \signal_low_voltage[22]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_102, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[23]~I (
.datain(!\signal_low_voltage[23]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[23]));
// synopsys translate_off
defparam \signal_low_voltage[23]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_109, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[24]~I (
.datain(!\signal_low_voltage[24]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[24]));
// synopsys translate_off
defparam \signal_low_voltage[24]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_110, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[25]~I (
.datain(!\signal_low_voltage[25]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[25]));
// synopsys translate_off
defparam \signal_low_voltage[25]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_111, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[26]~I (
.datain(!\signal_low_voltage[26]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[26]));
// synopsys translate_off
defparam \signal_low_voltage[26]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_112, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[27]~I (
.datain(!\signal_low_voltage[27]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[27]));
// synopsys translate_off
defparam \signal_low_voltage[27]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_119, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[28]~I (
.datain(!\signal_low_voltage[28]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[28]));
// synopsys translate_off
defparam \signal_low_voltage[28]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_120, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[29]~I (
.datain(!\signal_low_voltage[29]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[29]));
// synopsys translate_off
defparam \signal_low_voltage[29]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_121, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[30]~I (
.datain(!\signal_low_voltage[30]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[30]));
// synopsys translate_off
defparam \signal_low_voltage[30]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_122, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[31]~I (
.datain(!\signal_low_voltage[31]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[31]));
// synopsys translate_off
defparam \signal_low_voltage[31]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_129, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[32]~I (
.datain(!\signal_low_voltage[32]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[32]));
// synopsys translate_off
defparam \signal_low_voltage[32]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_130, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[33]~I (
.datain(!\signal_low_voltage[33]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[33]));
// synopsys translate_off
defparam \signal_low_voltage[33]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_131, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[34]~I (
.datain(!\signal_low_voltage[34]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[34]));
// synopsys translate_off
defparam \signal_low_voltage[34]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_132, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[35]~I (
.datain(!\signal_low_voltage[35]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[35]));
// synopsys translate_off
defparam \signal_low_voltage[35]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_139, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[36]~I (
.datain(!\signal_low_voltage[36]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[36]));
// synopsys translate_off
defparam \signal_low_voltage[36]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_140, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[37]~I (
.datain(!\signal_low_voltage[37]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[37]));
// synopsys translate_off
defparam \signal_low_voltage[37]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_141, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[38]~I (
.datain(!\signal_low_voltage[38]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[38]));
// synopsys translate_off
defparam \signal_low_voltage[38]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_142, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[39]~I (
.datain(!\signal_low_voltage[39]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[39]));
// synopsys translate_off
defparam \signal_low_voltage[39]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_5, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[40]~I (
.datain(!\signal_low_voltage[40]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[40]));
// synopsys translate_off
defparam \signal_low_voltage[40]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_6, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[41]~I (
.datain(!\signal_low_voltage[41]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[41]));
// synopsys translate_off
defparam \signal_low_voltage[41]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_7, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[42]~I (
.datain(!\signal_low_voltage[42]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[42]));
// synopsys translate_off
defparam \signal_low_voltage[42]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_8, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[43]~I (
.datain(!\signal_low_voltage[43]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[43]));
// synopsys translate_off
defparam \signal_low_voltage[43]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_21, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[44]~I (
.datain(!\signal_low_voltage[44]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[44]));
// synopsys translate_off
defparam \signal_low_voltage[44]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_22, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[45]~I (
.datain(!\signal_low_voltage[45]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[45]));
// synopsys translate_off
defparam \signal_low_voltage[45]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_23, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[46]~I (
.datain(!\signal_low_voltage[46]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[46]));
// synopsys translate_off
defparam \signal_low_voltage[46]~I .operation_mode = "output";
// synopsys translate_on
// Location: PIN_24, I/O Standard: 3.3-V LVTTL, Current Strength: 16mA
maxii_io \signal_low_voltage[47]~I (
.datain(!\signal_low_voltage[47]~reg0_regout ),
.oe(vcc),
.combout(),
.padio(signal_low_voltage[47]));
// synopsys translate_off
defparam \signal_low_voltage[47]~I .operation_mode = "output";
// synopsys translate_on
endmodule
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