# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2010 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Full Version
# Date created = 13:42:56  December 10, 2011
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		PF1_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name DEVICE EPM1270T144C5
set_global_assignment -name TOP_LEVEL_ENTITY PF1
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.1 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:42:56  DECEMBER 10, 2011"
set_global_assignment -name LAST_QUARTUS_VERSION "20.1.1 Lite Edition"
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 3.3V
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_37 -to rst_n
set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH tb_PF1 -section_id eda_simulation
set_global_assignment -name EDA_TEST_BENCH_NAME PF1 -section_id eda_simulation
set_global_assignment -name EDA_DESIGN_INSTANCE_NAME i1 -section_id PF1
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME PF1_vlg_tst -section_id PF1
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_14 -to signal_high_voltage[46]
set_location_assignment PIN_15 -to signal_high_voltage[47]
set_location_assignment PIN_12 -to signal_high_voltage[44]
set_location_assignment PIN_13 -to signal_high_voltage[45]
set_location_assignment PIN_4 -to signal_high_voltage[43]
set_location_assignment PIN_3 -to signal_high_voltage[42]
set_location_assignment PIN_2 -to signal_high_voltage[41]
set_location_assignment PIN_1 -to signal_high_voltage[40]
set_location_assignment PIN_138 -to signal_high_voltage[39]
set_location_assignment PIN_137 -to signal_high_voltage[38]
set_location_assignment PIN_134 -to signal_high_voltage[37]
set_location_assignment PIN_133 -to signal_high_voltage[36]
set_location_assignment PIN_127 -to signal_high_voltage[35]
set_location_assignment PIN_125 -to signal_high_voltage[34]
set_location_assignment PIN_124 -to signal_high_voltage[33]
set_location_assignment PIN_123 -to signal_high_voltage[32]
set_location_assignment PIN_118 -to signal_high_voltage[31]
set_location_assignment PIN_117 -to signal_high_voltage[30]
set_location_assignment PIN_114 -to signal_high_voltage[29]
set_location_assignment PIN_113 -to signal_high_voltage[28]
set_location_assignment PIN_106 -to signal_high_voltage[27]
set_location_assignment PIN_105 -to signal_high_voltage[26]
set_location_assignment PIN_104 -to signal_high_voltage[25]
set_location_assignment PIN_103 -to signal_high_voltage[24]
set_location_assignment PIN_96 -to signal_high_voltage[23]
set_location_assignment PIN_95 -to signal_high_voltage[22]
set_location_assignment PIN_94 -to signal_high_voltage[21]
set_location_assignment PIN_93 -to signal_high_voltage[20]
set_location_assignment PIN_86 -to signal_high_voltage[19]
set_location_assignment PIN_85 -to signal_high_voltage[18]
set_location_assignment PIN_84 -to signal_high_voltage[17]
set_location_assignment PIN_81 -to signal_high_voltage[16]
set_location_assignment PIN_76 -to signal_high_voltage[15]
set_location_assignment PIN_75 -to signal_high_voltage[14]
set_location_assignment PIN_74 -to signal_high_voltage[13]
set_location_assignment PIN_73 -to signal_high_voltage[12]
set_location_assignment PIN_68 -to signal_high_voltage[11]
set_location_assignment PIN_67 -to signal_high_voltage[10]
set_location_assignment PIN_66 -to signal_high_voltage[9]
set_location_assignment PIN_63 -to signal_high_voltage[8]
set_location_assignment PIN_58 -to signal_high_voltage[7]
set_location_assignment PIN_57 -to signal_high_voltage[6]
set_location_assignment PIN_55 -to signal_high_voltage[5]
set_location_assignment PIN_53 -to signal_high_voltage[4]
set_location_assignment PIN_48 -to signal_high_voltage[3]
set_location_assignment PIN_45 -to signal_high_voltage[2]
set_location_assignment PIN_44 -to signal_high_voltage[1]
set_location_assignment PIN_43 -to signal_high_voltage[0]
set_location_assignment PIN_24 -to signal_low_voltage[47]
set_location_assignment PIN_23 -to signal_low_voltage[46]
set_location_assignment PIN_22 -to signal_low_voltage[45]
set_location_assignment PIN_21 -to signal_low_voltage[44]
set_location_assignment PIN_8 -to signal_low_voltage[43]
set_location_assignment PIN_7 -to signal_low_voltage[42]
set_location_assignment PIN_6 -to signal_low_voltage[41]
set_location_assignment PIN_5 -to signal_low_voltage[40]
set_location_assignment PIN_142 -to signal_low_voltage[39]
set_location_assignment PIN_141 -to signal_low_voltage[38]
set_location_assignment PIN_140 -to signal_low_voltage[37]
set_location_assignment PIN_139 -to signal_low_voltage[36]
set_location_assignment PIN_132 -to signal_low_voltage[35]
set_location_assignment PIN_131 -to signal_low_voltage[34]
set_location_assignment PIN_130 -to signal_low_voltage[33]
set_location_assignment PIN_129 -to signal_low_voltage[32]
set_location_assignment PIN_122 -to signal_low_voltage[31]
set_location_assignment PIN_121 -to signal_low_voltage[30]
set_location_assignment PIN_120 -to signal_low_voltage[29]
set_location_assignment PIN_119 -to signal_low_voltage[28]
set_location_assignment PIN_112 -to signal_low_voltage[27]
set_location_assignment PIN_111 -to signal_low_voltage[26]
set_location_assignment PIN_110 -to signal_low_voltage[25]
set_location_assignment PIN_109 -to signal_low_voltage[24]
set_location_assignment PIN_102 -to signal_low_voltage[23]
set_location_assignment PIN_101 -to signal_low_voltage[22]
set_location_assignment PIN_98 -to signal_low_voltage[21]
set_location_assignment PIN_97 -to signal_low_voltage[20]
set_location_assignment PIN_91 -to signal_low_voltage[19]
set_location_assignment PIN_89 -to signal_low_voltage[18]
set_location_assignment PIN_88 -to signal_low_voltage[17]
set_location_assignment PIN_87 -to signal_low_voltage[16]
set_location_assignment PIN_80 -to signal_low_voltage[15]
set_location_assignment PIN_79 -to signal_low_voltage[14]
set_location_assignment PIN_78 -to signal_low_voltage[13]
set_location_assignment PIN_77 -to signal_low_voltage[12]
set_location_assignment PIN_72 -to signal_low_voltage[11]
set_location_assignment PIN_71 -to signal_low_voltage[10]
set_location_assignment PIN_70 -to signal_low_voltage[9]
set_location_assignment PIN_69 -to signal_low_voltage[8]
set_location_assignment PIN_62 -to signal_low_voltage[7]
set_location_assignment PIN_61 -to signal_low_voltage[6]
set_location_assignment PIN_60 -to signal_low_voltage[5]
set_location_assignment PIN_59 -to signal_low_voltage[4]
set_location_assignment PIN_52 -to signal_low_voltage[3]
set_location_assignment PIN_51 -to signal_low_voltage[2]
set_location_assignment PIN_50 -to signal_low_voltage[1]
set_location_assignment PIN_49 -to signal_low_voltage[0]
set_location_assignment PIN_18 -to sys_clk
set_location_assignment PIN_40 -to line_sclk
set_location_assignment PIN_41 -to line_sdata
set_location_assignment PIN_39 -to line_sen
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
set_global_assignment -name EDA_TEST_BENCH_NAME tb_PF1 -section_id eda_simulation
set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id tb_PF1
set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "5 ms" -section_id tb_PF1
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_PF1 -section_id tb_PF1
set_global_assignment -name VERILOG_FILE tb_PF1.v
set_global_assignment -name VERILOG_FILE PF1.v
set_global_assignment -name EDA_TEST_BENCH_FILE simulation/modelsim/PF1.vt -section_id PF1
set_global_assignment -name EDA_TEST_BENCH_FILE tb_PF1.v -section_id tb_PF1