更新了版本说明

确认了不需要长时间开启保护 issue#6
每路阀添加单独的开启超时机制
2025-11-09 14:54:12 +00:00 · 2022-08-31 14:53:55 +08:00 · 2022-08-31 14:46:32 +08:00 · 2022-08-24 22:10:11 +08:00 · 2022-08-24 13:27:43 +08:00 · 2022-07-26 20:47:43 +08:00
53 changed files with 1256 additions and 1801 deletions
--- a/README.md
+++ b/README.md
@ -13,7 +13,7 @@

 ## 版本

-由于阀板经常有不同类型的新要求出现，比如24路阀板、32路阀板、控制不同参数的新阀，因此不同的阀板型号（注意不是更新，比如阀板上添加级联接口属于更新）应建立不同的分支，**主分支无实际意义**
+由于阀板经常有不同类型的新要求出现，比如24路阀板、32路阀板、控制不同参数的新阀，因此不同的阀板型号（注意不是更新，比如阀板上添加级联接口属于更新）应建立不同的分支，**[b01-c48-ponlytest-vgeneral](https://github.com/NanjingForestryUniversity/valveboard/tree/b01-c48-ponlytest-vgeneral)分支无实际意义**

 分支命名规则（不使用中文，小写无空格）

@ -35,5 +35,9 @@ b分支编号-h硬件版本-p协议版本-f固件版本

 ##  作者

-**丁坤，2019年9月入学、丁坤QQ1091546069、丁坤电话17761700156**，他觉得老阀板工程很乱，重新开发了关于阀板的一切，并放到这个仓库里，计划以后就在这个仓库里迭代更新，无论有没有毕业，都很乐意解答关于阀板的所有问题
+[过奕任](https://github.com/3703781)、丁坤。老阀板工程很乱，重新开发了关于阀板的一切，并放到这个仓库里，以后就在这个仓库里迭代更新。欢迎提[issue](https://github.com/NanjingForestryUniversity/valveboard/issues)，bug随缘解决。
+
+丁坤2019年入学虽然已经毕业，但也很乐意解答关于阀板的所有问题。丁坤QQ1091546069、丁坤电话17761700156。
+
+过奕任2020年入学，目前正打算找其他人接管这个库，毕业了就不要找他，但永远可以找丁坤。

--- a/examples/README.md
+++ b/examples/README.md
@ -17,6 +17,9 @@
  基于嵌入式linux的程序，线程安全，具体板子为EPC-9600I-L，是广州致远电子有限公司开发的基于AM335x系列处理器的工控主板，处理器内核为800MHz的Arm Cortex-A8。

 ##  作者
+[过奕任](https://github.com/3703781)、丁坤。欢迎提[issue](https://github.com/NanjingForestryUniversity/valveboard/issues)，bug随缘解决。

-**丁坤，2019年9月入学、丁坤QQ1091546069、丁坤电话17761700156**，无论有没有毕业，都很乐意解答关于这份协议的所有问题

+过奕任2020年入学，目前正打算找其他人接管这个库，毕业了就不要找他，但永远可以找丁坤。
+
+丁坤2019年入学、丁坤QQ1091546069、丁坤电话17761700156，已经毕业，但很乐意解答所有问题。
--- a/firmware/README.md
+++ b/firmware/README.md
@ -1,16 +1,44 @@
 # 阀板固件

-这是阀板上CPLD的固件，严格意义上也属于硬件，因为是描述的硬件结构。这个固件是按照通信协议写的，但比通信协议能适应更广的传输速度，**烟梗分选机上`SCLK`为2MHz，高电平时间为0.37ms**
+这是阀板上CPLD的固件，严格意义上也属于硬件，因为是描述的硬件结构。这个固件是按照通信协议写的，但比通信协议能适应更广的传输速度，**烟梗分选机上`SCLK`为2MHz，高电平时间为0.2ms**

 ## 如何烧录

-去学习下intel系列的FPGA，用的是Quartus软件，自然就会了
+Quartus软件

 ## 程序说明

-都在注释里，清清楚楚
+看程序注释
+
+## Changelog
+### v1.0
+
+继承自老程序
+
+### v1.1
+
+丁坤重写了
+
+### v1.2
+
+修正了引脚分配
+
+### v1.3
+
+- 添加了高电压抑制，见[issue#4](https://github.com/NanjingForestryUniversity/valveboard/issues/4)
+- 修正了高电压时间为0.2ms
+
+### v1.4
+
+确认了阀不需要长时间开启保护，删除了阀板固件v1.4-beta1([commit 6af8df](https://github.com/NanjingForestryUniversity/valveboard/commit/6af8dfd09c268d677a46063cc9637f573e69919e))中的长时间开启保护，见[issue#6](https://github.com/NanjingForestryUniversity/valveboard/issues/6)
+

 ## 作者
+[过奕任](https://github.com/3703781)、丁坤

-**作者是丁坤，2019年9月入学、丁坤QQ1091546069、丁坤电话17761700156**，他是搞嵌入式的，自师兄王聪（2018年9月入学）毕业后硬件领域师门出现空档期，被老倪催的没办法了，就学了硬件并顺手写了这份FPGA代码，无论有没有毕业，作者都很乐意解答关于固件的所有问题
+过奕任自师兄王聪（2018年入学）毕业后硬件方面师门出现空档期，被老倪催的没办法了，就学了硬件并顺手写了这份FPGA代码。丁坤是专门搞嵌入式的，但也看过这份代码。欢迎提[issue](https://github.com/NanjingForestryUniversity/valveboard/issues)，bug随缘解决。
+
+过奕任2020年入学，目前正打算找其他人接管这个库，毕业了就不要找他，但永远可以找丁坤。
+
+丁坤2019年入学、丁坤QQ1091546069、丁坤电话17761700156，已经毕业，但很乐意解答所有问题。

--- a/firmware/db/prev_cmp_valveboard_firmware.qmsg
+++ b/firmware/db/prev_cmp_valveboard_firmware.qmsg
@ -1,93 +0,0 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1653573984153 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition " "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1653573984153 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu May 26 22:06:24 2022 " "Processing started: Thu May 26 22:06:24 2022" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1653573984153 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1653573984153 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off valveboard_firmware -c valveboard_firmware " "Command: quartus_map --read_settings_files=on --write_settings_files=off valveboard_firmware -c valveboard_firmware" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1653573984153 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1653573984403 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1653573984403 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "valveboard_firmware.v 1 1 " "Found 1 design units, including 1 entities, in source file valveboard_firmware.v" { { "Info" "ISGN_ENTITY_NAME" "1 valveboard_firmware " "Found entity 1: valveboard_firmware" {  } { { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1653573990653 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1653573990653 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "tb_valveboard_firmware.v 1 1 " "Found 1 design units, including 1 entities, in source file tb_valveboard_firmware.v" { { "Info" "ISGN_ENTITY_NAME" "1 tb_valveboard_firmware " "Found entity 1: tb_valveboard_firmware" {  } { { "tb_valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/tb_valveboard_firmware.v" 2 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1653573990653 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1653573990653 ""}
-{ "Info" "ISGN_START_ELABORATION_TOP" "valveboard_firmware " "Elaborating entity \"valveboard_firmware\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1653573990669 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 valveboard_firmware.v(90) " "Verilog HDL assignment warning at valveboard_firmware.v(90): truncated value with size 32 to match size of target (5)" {  } { { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 90 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1653573990684 "|valveboard_firmware"}
-{ "Info" "IFTM_FTM_PRESET_POWER_UP" "" "Registers with preset signals will power-up high" {  } { { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 290 -1 0 } } { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 266 -1 0 } } { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 145 -1 0 } } { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 93 -1 0 } }  } 0 18000 "Registers with preset signals will power-up high" 0 0 "Analysis & Synthesis" 0 -1 1653573991184 ""}
-{ "Info" "ICUT_CUT_TM_SUMMARY" "569 " "Implemented 569 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "5 " "Implemented 5 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1653573991278 ""} { "Info" "ICUT_CUT_TM_OPINS" "96 " "Implemented 96 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1653573991278 ""} { "Info" "ICUT_CUT_TM_LCELLS" "468 " "Implemented 468 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1653573991278 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1653573991278 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4709 " "Peak virtual memory: 4709 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1653573991325 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu May 26 22:06:31 2022 " "Processing ended: Thu May 26 22:06:31 2022" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1653573991325 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Elapsed time: 00:00:07" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1653573991325 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:16 " "Total CPU time (on all processors): 00:00:16" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1653573991325 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1653573991325 ""}
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Analysis & Synthesis" 0 -1 1653573992481 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus Prime " "Running Quartus Prime Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition " "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1653573992481 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu May 26 22:06:32 2022 " "Processing started: Thu May 26 22:06:32 2022" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1653573992481 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Fitter" 0 -1 1653573992481 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off valveboard_firmware -c valveboard_firmware " "Command: quartus_fit --read_settings_files=off --write_settings_files=off valveboard_firmware -c valveboard_firmware" {  } {  } 0 0 "Command: %1!s!" 0 0 "Fitter" 0 -1 1653573992481 ""}
-{ "Info" "0" "" "qfit2_default_script.tcl version: #1" {  } {  } 0 0 "qfit2_default_script.tcl version: #1" 0 0 "Fitter" 0 0 1653573992559 ""}
-{ "Info" "0" "" "Project  = valveboard_firmware" {  } {  } 0 0 "Project  = valveboard_firmware" 0 0 "Fitter" 0 0 1653573992559 ""}
-{ "Info" "0" "" "Revision = valveboard_firmware" {  } {  } 0 0 "Revision = valveboard_firmware" 0 0 "Fitter" 0 0 1653573992559 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1653573992591 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1653573992591 ""}
-{ "Info" "IMPP_MPP_USER_DEVICE" "valveboard_firmware EPM1270T144C5 " "Selected device EPM1270T144C5 for design \"valveboard_firmware\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1653573992591 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1653573992622 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1653573992622 ""}
-{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1653573992653 ""}
-{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." {  } {  } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1653573992653 ""}
-{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T144C5 " "Device EPM570T144C5 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1653573992731 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T144I5 " "Device EPM570T144I5 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1653573992731 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T144A5 " "Device EPM570T144A5 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1653573992731 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM1270T144I5 " "Device EPM1270T144I5 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1653573992731 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM1270T144A5 " "Device EPM1270T144A5 is compatible" {  } {  } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1653573992731 ""}  } {  } 2 176444 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "Fitter" 0 -1 1653573992731 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "valveboard_firmware.sdc " "Synopsys Design Constraints File file not found: 'valveboard_firmware.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1653573992809 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1653573992809 ""}
-{ "Info" "ISTA_DEFAULT_TDC_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ISTA_ASSUMED_DEFAULT_TDC_REQUIREMENT" "" "Assuming a default timing requirement" {  } {  } 0 332127 "Assuming a default timing requirement" 0 0 "Design Software" 0 -1 1653573992809 ""}  } {  } 0 332128 "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" 0 0 "Fitter" 0 -1 1653573992809 ""}
-{ "Info" "ISTA_REPORT_CLOCKS_INFO" "Found 1 clocks " "Found 1 clocks" { { "Info" "ISTA_REPORT_CLOCKS_INFO" "  Period   Clock Name " "  Period   Clock Name" {  } {  } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1653573992809 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "======== ============ " "======== ============" {  } {  } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1653573992809 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "   1.000      sys_clk " "   1.000      sys_clk" {  } {  } 0 332111 "%1!s!" 0 0 "Design Software" 0 -1 1653573992809 ""}  } {  } 0 332111 "%1!s!" 0 0 "Fitter" 0 -1 1653573992809 ""}
-{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 176273 "Performing register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1653573992825 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 176274 "Completed register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1653573992825 ""}
-{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Completed User Assigned Global Signals Promotion Operation" {  } {  } 0 186079 "Completed %1!s!" 0 0 "Fitter" 0 -1 1653573992825 ""}
-{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "sys_clk Global clock in PIN 18 " "Automatically promoted signal \"sys_clk\" to use Global clock in PIN 18" {  } { { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 9 -1 0 } }  } 0 186215 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0 "Fitter" 0 -1 1653573992841 ""}
-{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "rst_n Global clock " "Automatically promoted some destinations of signal \"rst_n\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "negedge_line_sen " "Destination \"negedge_line_sen\" may be non-global or may not use global clock" {  } { { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 106 -1 0 } }  } 0 186217 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "Design Software" 0 -1 1653573992841 ""} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "fiter_line_sdata " "Destination \"fiter_line_sdata\" may be non-global or may not use global clock" {  } { { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 87 -1 0 } }  } 0 186217 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "Design Software" 0 -1 1653573992841 ""}  } { { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 10 -1 0 } }  } 0 186216 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0 "Fitter" 0 -1 1653573992841 ""}
-{ "Info" "IFYGR_FYGR_PIN_USES_INTERNAL_GLOBAL" "rst_n " "Pin \"rst_n\" drives global clock, but is not placed in a dedicated clock pin position" {  } { { "c:/programdata/intelfpga_lite/20.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/programdata/intelfpga_lite/20.1/quartus/bin64/pin_planner.ppl" { rst_n } } } { "c:/programdata/intelfpga_lite/20.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/programdata/intelfpga_lite/20.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "rst_n" } } } } { "valveboard_firmware.v" "" { Text "C:/Users/miaow/Desktop/firmware/valveboard_firmware.v" 10 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/miaow/Desktop/firmware/" { { 0 { 0 ""} 0 655 14177 15141 0 0 "" 0 "" "" }  }  } }  } 0 186228 "Pin \"%1!s!\" drives global clock, but is not placed in a dedicated clock pin position" 0 0 "Fitter" 0 -1 1653573992841 ""}
-{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Completed Auto Global Promotion Operation" {  } {  } 0 186079 "Completed %1!s!" 0 0 "Fitter" 0 -1 1653573992841 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176234 "Starting register packing" 0 0 "Fitter" 0 -1 1653573992841 ""}
-{ "Extra Info" "IFSAC_FSAC_START_LUT_PACKING" "" "Moving registers into LUTs to improve timing and density" {  } {  } 1 176244 "Moving registers into LUTs to improve timing and density" 1 0 "Fitter" 0 -1 1653573992872 ""}
-{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_HEADER" "" "Started processing fast register assignments" {  } {  } 0 186468 "Started processing fast register assignments" 0 0 "Fitter" 0 -1 1653573992919 ""}
-{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_FOOTER" "" "Finished processing fast register assignments" {  } {  } 0 186469 "Finished processing fast register assignments" 0 0 "Fitter" 0 -1 1653573992919 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_LUT_PACKING" "00:00:00 " "Finished moving registers into LUTs: elapsed time is 00:00:00" {  } {  } 1 176245 "Finished moving registers into LUTs: elapsed time is %1!s!" 1 0 "Fitter" 0 -1 1653573992919 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" {  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1653573992919 ""}
-{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:00 " "Fitter preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 171121 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1653573992966 ""}
-{ "Info" "IVPR20K_VPR_FAMILY_APL_ERROR" "" "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." {  } {  } 0 14896 "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." 0 0 "Fitter" 0 -1 1653573992966 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1653573993059 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1653573993294 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1653573993294 ""}
-{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1653573994653 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:01 " "Fitter placement operations ending: elapsed time is 00:00:01" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1653573994653 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1653573994700 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "11 " "Router estimated average interconnect usage is 11% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "13 X0_Y0 X8_Y11 " "Router estimated peak interconnect usage is 13% of the available device resources in the region that extends from location X0_Y0 to location X8_Y11" {  } { { "loc" "" { Generic "C:/Users/miaow/Desktop/firmware/" { { 1 { 0 "Router estimated peak interconnect usage is 13% of the available device resources in the region that extends from location X0_Y0 to location X8_Y11"} { { 12 { 0 ""} 0 0 9 12 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1653573994919 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1653573994919 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1653573995200 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1653573995200 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1653573995200 ""}
-{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 0.47 " "Total time spent on timing analysis during the Fitter is 0.47 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1653573995216 ""}
-{ "Info" "IFITCC_FITTER_POST_OPERATION_END" "00:00:00 " "Fitter post-fit operations ending: elapsed time is 00:00:00" {  } {  } 0 11218 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1653573995216 ""}
-{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 169174 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "Fitter" 0 -1 1653573995263 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Users/miaow/Desktop/firmware/output_files/valveboard_firmware.fit.smsg " "Generated suppressed messages file C:/Users/miaow/Desktop/firmware/output_files/valveboard_firmware.fit.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1653573995309 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "5910 " "Peak virtual memory: 5910 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1653573995325 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu May 26 22:06:35 2022 " "Processing ended: Thu May 26 22:06:35 2022" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1653573995325 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1653573995325 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:06 " "Total CPU time (on all processors): 00:00:06" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1653573995325 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1653573995325 ""}
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Fitter" 0 -1 1653573996325 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition " "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1653573996325 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu May 26 22:06:36 2022 " "Processing started: Thu May 26 22:06:36 2022" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1653573996325 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1653573996325 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off valveboard_firmware -c valveboard_firmware " "Command: quartus_asm --read_settings_files=off --write_settings_files=off valveboard_firmware -c valveboard_firmware" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1653573996325 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1653573996513 ""}
-{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" {  } {  } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1653573996544 ""}
-{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1653573996544 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4671 " "Peak virtual memory: 4671 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1653573996653 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu May 26 22:06:36 2022 " "Processing ended: Thu May 26 22:06:36 2022" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1653573996653 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Elapsed time: 00:00:00" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1653573996653 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1653573996653 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1653573996653 ""}
-{ "Info" "IFLOW_DISABLED_MODULE" "Power Analyzer FLOW_ENABLE_POWER_ANALYZER " "Skipped module Power Analyzer due to the assignment FLOW_ENABLE_POWER_ANALYZER" {  } {  } 0 293026 "Skipped module %1!s! due to the assignment %2!s!" 0 0 "Assembler" 0 -1 1653573997231 ""}
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Assembler" 0 -1 1653573997747 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition " "Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1653573997747 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu May 26 22:06:37 2022 " "Processing started: Thu May 26 22:06:37 2022" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1653573997747 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1653573997747 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta valveboard_firmware -c valveboard_firmware " "Command: quartus_sta valveboard_firmware -c valveboard_firmware" {  } {  } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1653573997747 ""}
-{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1653573997826 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Timing Analyzer" 0 -1 1653573997919 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Timing Analyzer" 0 -1 1653573997919 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1653573997951 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1653573997951 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1653573997997 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1653573998310 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "valveboard_firmware.sdc " "Synopsys Design Constraints File file not found: 'valveboard_firmware.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Timing Analyzer" 0 -1 1653573998357 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1653573998357 ""}
-{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name sys_clk sys_clk " "create_clock -period 1.000 -name sys_clk sys_clk" {  } {  } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1653573998357 ""}  } {  } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1653573998357 ""}
-{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1653573998357 ""}
-{ "Info" "0" "" "Can't run Report Timing Closure Recommendations. The current device family is not supported." {  } {  } 0 0 "Can't run Report Timing Closure Recommendations. The current device family is not supported." 0 0 "Timing Analyzer" 0 0 1653573998372 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" {  } {  } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1653573998372 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -10.920 " "Worst-case setup slack is -10.920" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998372 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998372 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -10.920           -2224.374 sys_clk  " "  -10.920           -2224.374 sys_clk " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998372 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1653573998372 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 1.397 " "Worst-case hold slack is 1.397" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998388 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998388 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.397               0.000 sys_clk  " "    1.397               0.000 sys_clk " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998388 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1653573998388 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1653573998388 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1653573998388 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.289 " "Worst-case minimum pulse width slack is -2.289" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998388 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998388 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.289              -2.289 sys_clk  " "   -2.289              -2.289 sys_clk " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1653573998388 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1653573998388 ""}
-{ "Info" "ISTA_METASTABILITY_REPORT_DISABLED" "" "The selected device family is not supported by the report_metastability command." {  } {  } 0 332001 "The selected device family is not supported by the report_metastability command." 0 0 "Timing Analyzer" 0 -1 1653573998403 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1653573998419 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1653573998419 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 3 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4687 " "Peak virtual memory: 4687 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1653573998451 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu May 26 22:06:38 2022 " "Processing ended: Thu May 26 22:06:38 2022" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1653573998451 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1653573998451 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1653573998451 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1653573998451 ""}
-{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 10 s " "Quartus Prime Full Compilation was successful. 0 errors, 10 warnings" {  } {  } 0 293000 "Quartus Prime %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1653573999091 ""}
--- a/firmware/db/valveboard_firmware.db_info
+++ b/firmware/db/valveboard_firmware.db_info
@ -1,3 +1,3 @@
 Quartus_Version = Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 Version_Index = 520278016
-Creation_Time = Thu May 26 22:11:13 2022
+Creation_Time = Wed Aug 31 14:18:53 2022
--- a/firmware/output_files/valveboard_firmware.cdf
+++ b/firmware/output_files/valveboard_firmware.cdf
@ -1,13 +0,0 @@
-/* Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition */
-JedecChain;
-	FileRevision(JESD32A);
-	DefaultMfr(6E);
-
-	P ActionCode(Cfg)
-		Device PartName(EPM1270T144) Path("C:/Users/miaow/Desktop/firmware/output_files/") File("valveboard_firmware.pof") MfrSpec(OpMask(23) SEC_Device(EPM1270T144) Child_OpMask(2 7 7));
-
-ChainEnd;
-
-AlteraBegin;
-	ChainType(JTAG);
-AlteraEnd;
--- a/firmware/output_files/valveboard_firmware.done
+++ b/firmware/output_files/valveboard_firmware.done
@ -1 +0,0 @@
-Thu May 26 22:10:32 2022
--- a/firmware/tb_valveboard_firmware.v
+++ b/firmware/tb_valveboard_firmware.v
@ -6,8 +6,8 @@ module tb_valveboard_firmware();
 	reg line_sen;
 	reg line_sdata;
 	
-	wire [48:0]  signal_high_voltage;
-	wire [48:0]  signal_low_voltage;
+	wire [47:0]  signal_high_voltage;
+	wire [47:0]  signal_low_voltage;

 	valveboard_firmware inst_valveboard_firmware(
 			.sys_clk (sys_clk),
@ -18,7 +18,7 @@ module tb_valveboard_firmware();
 			.signal_high_voltage (signal_high_voltage),
 			.signal_low_voltage (signal_low_voltage)
 		);
-
+    reg [47:0] valve_data;
    initial begin
        sys_clk = 0;
        rst_n = 0;
@ -28,27 +28,28 @@ module tb_valveboard_firmware();
 		#500;
 		rst_n = 1;
 		#500;
+		valve_data = 0;
 		
    end
 	
 	integer idx;
-	reg [47:0] valve_data;
-	always #1000000 begin
-		valve_data <= ~48'b1000_0000_0000_0000_0000_0000_0000_0001_0000_0000_0000_1001;
-		line_sen = 1;#100;
+	
+	always #500000 begin
+		valve_data = valve_data + 1;
+		line_sen = 1;#50;
 		for (idx = 0; idx < 48; idx = idx + 1) begin
-			if (valve_data[idx] == 0) begin
-				line_sdata = 0;#250;
-				line_sclk = 1;#250;
-				line_sdata = 1;#250;
-				line_sclk = 0;#500;
+			if (valve_data[idx] == 1) begin
+				line_sdata = 0;#125;
+				line_sclk = 1;#125;
+				line_sdata = 1;#125;
+				line_sclk = 0;#250;
 			end
 			else begin
-				line_sclk = 1;#500;
-				line_sclk = 0;#500;
+				line_sclk = 1;#250;
+				line_sclk = 0;#250;
 			end
 		end
-		#100;
+		#50;
 		line_sen = 0;
 	end
 	
--- a/firmware/valveboard_firmware.qsf
+++ b/firmware/valveboard_firmware.qsf
@ -252,4 +252,18 @@ set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to signal_low_voltage[3
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to signal_low_voltage[2]
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to signal_low_voltage[1]
 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to signal_low_voltage[0]
-set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_clk
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_clk
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
+set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity
+set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan
+set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
+set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH nnormal_test -section_id eda_simulation
+set_global_assignment -name EDA_TEST_BENCH_NAME nnormal_test -section_id eda_simulation
+set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id nnormal_test
+set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME nnormal_test -section_id nnormal_test
+set_global_assignment -name EDA_TEST_BENCH_FILE tb_valveboard_firmware.v -section_id nnormal_test
--- a/firmware/valveboard_firmware.qws
+++ b/firmware/valveboard_firmware.qws
--- a/firmware/valveboard_firmware.v
+++ b/firmware/valveboard_firmware.v
@ -1,8 +1,7 @@
 /* 
-丁坤的阀板程序 2021/12/26
-对应原理图ValveBoard Kun v1.1.pdf
-将b01-h1.1-p1.1-f1.1中的高压时间改为0.37ms
-使用的是合肥的阀，1A电流需0.37ms的100V(阀标称100V，现场供电为96V)高电压
+阀板程序v1.4 2022/8/31
+经测试，高压时间改为0.2ms
+使用的是合肥的阀，1.5A电流需0.2ms的100V(阀标称100V，现场供电为96V)高电压
 */

 module valveboard_firmware(
@ -19,9 +18,9 @@ module valveboard_firmware(
 		
 	parameter CHANNEL_NUM = 48;
 	parameter CHANNEL_NUM_MINUS_1 = CHANNEL_NUM - 1;
-	parameter HIGH_VOLTAGE_TIME = 32'd7400;  // 高压时间HIGH_VOLTAGE_TIME / 20MHz = 0.37ms
-	parameter HIGH_VOLTAGE_TIME_MINUS_1 = HIGH_VOLTAGE_TIME - 1;  // 高压时间HIGH_VOLTAGE_TIME / 20MHz = 2ms
-	parameter FAULT_COUNTER_THRESHOLD = 32'd20_000_000;  // 通讯中断超过FAULT_COUNTER_THRESHOLD / 20MHz = 1s，就关所有阀
+	parameter HIGH_VOLTAGE_TIME = 32'd4000;  // 高压时间HIGH_VOLTAGE_TIME / 20MHz = 0.2ms
+	parameter HIGH_VOLTAGE_TIME_MINUS_1 = HIGH_VOLTAGE_TIME - 1;
+	parameter FAULT_COUNTER_THRESHOLD = 32'd20_000_000;  // 通讯中断超过FAULT_COUNTER_THRESHOLD / 20MHz = 200ms，就关所有阀
 	parameter FAULT_COUNTER_THRESHOLD_MINUS_1 = FAULT_COUNTER_THRESHOLD - 1;
 	parameter FAULT_COUNTER_THRESHOLD_PLUS_1 = FAULT_COUNTER_THRESHOLD + 1;
 	
@ -32,6 +31,7 @@ module valveboard_firmware(
 	reg [31:0] fault_counter;
 	reg [0:0] fault_flag [0:7];  // fault_flag支持8类错误信号
 	
+	
 	/**
 	 * 维护错误信号
 	 */
@ -256,19 +256,24 @@ module valveboard_firmware(

 	/**
 	 * recv_complete下降沿缓存cache_line_sdata数据到cache2_line_sdata并开始高电压时间计时
+	 * last_line_data则保存上一次的输出数据
 	 */
 	reg [CHANNEL_NUM_MINUS_1:0] cache2_line_sdata;
+	reg [CHANNEL_NUM_MINUS_1:0] last_line_sdata;
 	always @(posedge sys_clk or negedge rst_n) begin
 		if (!rst_n) begin
 			enable_count_high_voltage_time <= 0;
 			cache2_line_sdata <= ~0;
+			last_line_sdata <= ~0;
 		end
 		else if (total_fault_flag) begin
 			enable_count_high_voltage_time <= 0;
 			cache2_line_sdata <= ~0;
+			last_line_sdata <= ~0;
 		end
 		else if (recv_complete) begin
 			enable_count_high_voltage_time <= 1;
+			last_line_sdata <= cache2_line_sdata;
 			cache2_line_sdata <= cache_line_sdata;
 		end
 		else begin
@ -276,9 +281,10 @@ module valveboard_firmware(
 		end
 		
 	end
-	
+
 	/**
 	 * 高电压时间内(is_high_voltage_time高电平时)，按cache2_line_sdata打开所需高电压；高电压时间后关闭
+	 * 需要注意的是，已经开着的喷阀， 在高压时间内，不会再次使用高电压，只是保持低电压
 	 * 按cache2_line_sdata打开低电压
 	 * total_fault_flag会关闭所有喷阀
 	 */
@ -292,7 +298,8 @@ module valveboard_firmware(
 			signal_high_voltage <= ~0;
 		end
 		else if (is_high_voltage_time) begin
-			signal_high_voltage <= cache2_line_sdata;
+			// 已经开着的喷阀，在高压时间内，不会再次使用高电压，只是保持低电压
+			signal_high_voltage <= ~last_line_sdata | cache2_line_sdata;
 			signal_low_voltage <= cache2_line_sdata;
 		end
 		else begin
--- a/firmware/valveboard_firmware.v.bak
+++ b/firmware/valveboard_firmware.v.bak
@ -1,303 +0,0 @@
-/* 
-丁坤的阀板程序 2021/11/02
-对应原理图ValveBoard Kun v1.1.pdf
-*/
-
-module PF1(
-			input sys_clk,  // 20MHz
-			input rst_n,
-			input line_sclk,
-			input line_sen,
-			input line_sdata,
-			
-			output reg [47:0]  signal_high_voltage,
-			output reg [47:0]  signal_low_voltage
-			
-		);
-		
-	parameter CHANNEL_NUM = 48;
-	parameter CHANNEL_NUM_MINUS_1 = CHANNEL_NUM - 1;
-	parameter HIGH_VOLTAGE_TIME = 32'd40_000;  // 高压时间HIGH_VOLTAGE_TIME / 20MHz = 2ms
-	parameter HIGH_VOLTAGE_TIME_MINUS_1 = HIGH_VOLTAGE_TIME - 1;  // 高压时间HIGH_VOLTAGE_TIME / 20MHz = 2ms
-	parameter FAULT_COUNTER_THRESHOLD = 32'd20_000_000;  // 通讯中断超过FAULT_COUNTER_THRESHOLD / 20MHz = 1s，就关所有阀
-	parameter FAULT_COUNTER_THRESHOLD_MINUS_1 = FAULT_COUNTER_THRESHOLD - 1;
-	parameter FAULT_COUNTER_THRESHOLD_PLUS_1 = FAULT_COUNTER_THRESHOLD + 1;
-	
-		
-	
-	reg [CHANNEL_NUM_MINUS_1:0] cache_signal_high_voltage;
-	reg [31:0] i;
-	reg [31:0] fault_counter;
-	reg [0:0] fault_flag [0:7];  // fault_flag支持8类错误信号
-	
-	/**
-	 * 维护错误信号
-	 */
-	wire total_fault_flag = fault_flag[7] | fault_flag[6] | fault_flag[5] | fault_flag[4] | fault_flag[3] | fault_flag[2] | fault_flag[1] | fault_flag[0];
-	integer j;
-	initial begin
-	  for (j = 0; j < 8; j = j + 1) begin
-		fault_flag[j] = 1'b0;
-	  end
-	end
-//	/**
-//	 * 产生周期为100kHz的posedge_100khz信号，信号高电平持续1个sys_clk
-//	 */
-//	reg[7:0] cnt_for_posedge_100khz;
-//	reg posedge_100khz;
-//	always @(posedge sys_clk or negedge rst_n) begin
-//		if(!rst_n) begin
-//		   cnt_for_posedge_100khz <= 0;
-//		end
-//		else if(cnt_for_posedge_100khz == 199) begin
-//			posedge_100khz <= 1;
-//			cnt_for_posedge_100khz <= 0;
-//		end
-//		else begin
-//			cnt_for_posedge_100khz <= cnt_for_posedge_100khz + 1;
-//			posedge_100khz <= 0;
-//		end                            
-//	end
-
-	/**
-	 * 在输入的line_sclk信号上升沿产生1个sys_clk时长高电平的脉冲信号posedge_line_sclk，比原信号延迟(4,5]个sys_clk
-	 */
-	reg [4:0] cache_line_sclk;
-	reg posedge_line_sclk;
-	always@(posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			cache_line_sclk <= 0;	
-			posedge_line_sclk <= 0;
-		end
-		else begin
-			cache_line_sclk <= {cache_line_sclk[3:0], line_sclk};
-			if ({cache_line_sclk, line_sclk} == 6'b011111)
-				posedge_line_sclk <= 1;
-			else
-				posedge_line_sclk <= 0;
-		end
-	end
-	
-	/**
-	 * filter_line_sdata比原信号延迟(4,5]个sys_clk
-	 */
-	reg [4:0] tmp_cache_line_sdata;
-	reg fiter_line_sdata;
-	always@(posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			tmp_cache_line_sdata <= ~0;
-		end
-		else begin
-			tmp_cache_line_sdata <= {tmp_cache_line_sdata[3:0], line_sdata};
-			fiter_line_sdata <= tmp_cache_line_sdata[4];
-		end
-	end
-	
-	/**
-	 * 在输入的line_sen信号上升沿产生1个sys_clk时长高电平的脉冲信号posedge_line_sen，比原信号延迟(4,5]个sys_clk
-	 * 在输入的line_sen信号下降沿产生1个sys_clk时长高电平的脉冲信号negedge_line_sen，比原信号延迟(4,5]个sys_clk
-	 * 缓存和整理line_sen信号得filter_line_sen，比原信号延迟(4,5]个sys_clk
-	 */
-	reg [4:0] cache_line_sen;
-//	reg posedge_line_sen;
-	reg filter_line_sen;
-	reg negedge_line_sen;
-	always@(posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			cache_line_sen <= 0;
-			filter_line_sen <= 0;
-//			posedge_line_sen <= 0;
-		end
-		else begin
-			cache_line_sen <= {cache_line_sen[3:0], line_sen};
-			if ({cache_line_sen, line_sen} == 6'b011111) begin
-//				posedge_line_sen <= 1;
-				filter_line_sen <= 1;
-				negedge_line_sen <= 0;
-			end
-			else if ({cache_line_sen, line_sen} == 6'b100000) begin
-//				posedge_line_sen <= 0;
-				filter_line_sen <= 0;
-				negedge_line_sen <= 1;
-			end
-			else begin
-//				posedge_line_sen <= 0;
-				filter_line_sen <= filter_line_sen;
-				negedge_line_sen <= 0;
-			end
-		end
-	end
-	
-	/**
-	 * line_clk上升沿采样line_sdata，采样时刻与posedge_line_sclk下降沿对齐
-	 * total_fault_flag会相对line_clk异步结束本次通信
-	 * recv_complete指示是否接收完成，单sys_clk周期宽度，与negedge_line_sen信号对齐
-	 */
-	reg [CHANNEL_NUM_MINUS_1:0] cache_line_sdata;
-	wire recv_complete = negedge_line_sen && (i == CHANNEL_NUM);
-	always @ (posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			i <= 0;
-			cache_line_sdata <= ~0;
-		end
-		else if (total_fault_flag) begin
-			i <= 0;
-			cache_line_sdata <= ~0;
-		end
-		else if (filter_line_sen && posedge_line_sclk) begin
-			cache_line_sdata[i] <= fiter_line_sdata; 
-			i <= i + 1;  
-		end
-		else if (negedge_line_sen) begin
-			i <= 0;
-		end
-	end
-	
-	/**
-	 * 若接收超过CHANNEL_NUM个数据，产生错误信号fault_flag[0]；fault_flag[0]将在posedge_line_sen上升沿时刻清楚
-	 */
-	always @ (posedge sys_clk or negedge rst_n) begin
-		if (!rst_n)
-			fault_flag[0] <= 0;
-		else if (i > CHANNEL_NUM)
-			fault_flag[0] <= 1;
-		else if ({cache_line_sen, line_sen} == 6'b011111)
-			fault_flag[0] <= 0;
-		else
-			fault_flag[0] <= fault_flag[0];
-	end
-	 
-	/**
-	 * 若通讯中断，超过FAULT_COUNTER_THRESHOLD个csys_clk就置位fault_flag[1]
-	 * fault_flag[1]在posedge_line_sclk上升沿时刻清楚
-	 */
-	always @(posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			fault_counter <= 0;
-			fault_flag[1] <= 0;
-		end
-		else if ({cache_line_sclk, line_sclk} == 6'b011111) begin
-			fault_counter <= 0;
-			fault_flag[1] <= 0;
-		end
-		else begin
-			if (fault_counter >= FAULT_COUNTER_THRESHOLD_PLUS_1)
-				fault_flag[1] <= 1;
-			else if (fault_counter >= FAULT_COUNTER_THRESHOLD_MINUS_1) begin
-				fault_counter <= fault_counter + 1;
-				fault_flag[1] <= 1;
-			end
-			else begin
-				fault_counter <= fault_counter + 1;
-				fault_flag[1] <= 0;
-			end
-		end
-	end
-	
-	
-	/**
-	 * 得到enable_count_high_voltage_time的上升沿脉冲posedge_enable_count_high_voltage_time
-	 * enable_count_high_voltage_time是用于开启高电压计时的信号，在其上升沿开启计时
-	 */
-	reg [1:0] cache_enable_count_high_voltage_time;
-	reg enable_count_high_voltage_time;
-	wire posedge_enable_count_high_voltage_time = cache_enable_count_high_voltage_time[0] & ~cache_enable_count_high_voltage_time[1];
-	always @(posedge sys_clk or negedge rst_n) begin
-		if (!rst_n)
-			cache_enable_count_high_voltage_time <= 0;
-		else begin
-			cache_enable_count_high_voltage_time[0] <= enable_count_high_voltage_time;
-			cache_enable_count_high_voltage_time[1] <= cache_enable_count_high_voltage_time[0];
-		end
-	end
-	
-	/**
-	 * posedge_enable_count_high_voltage_time下降沿开始从HIGH_VOLTAGE_TIME-1向下计数，count_high_voltage_time_end上升沿与到0瞬间对齐
-	 * is_high_voltage_time表示当前是否需要输出高电平，其宽度为HIGH_VOLTAGE_TIME
-	 * posedge_count_high_voltage_time_complete脉冲时长为一个sys_clk
-	 */
-	reg [31:0] cnt_for_high_voltage_time;
-//	reg high_voltage_time_end;
-	reg is_high_voltage_time;
-	always @(posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			cnt_for_high_voltage_time <= 0;
-//			high_voltage_time_end <= 0;
-			is_high_voltage_time <= 0;
-		end
-		else if (total_fault_flag) begin
-			cnt_for_high_voltage_time <= 0;
-//			high_voltage_time_end <= 0;
-			is_high_voltage_time <= 0;
-		end
-		else if (posedge_enable_count_high_voltage_time) begin
-			cnt_for_high_voltage_time <= HIGH_VOLTAGE_TIME_MINUS_1;
-//			high_voltage_time_end <= 0;
-			is_high_voltage_time <= 1;
-		end
-		else if (cnt_for_high_voltage_time > 1) begin
-			cnt_for_high_voltage_time <= cnt_for_high_voltage_time - 1;
-//			high_voltage_time_end <= 0;
-			is_high_voltage_time <= 1;
-		end
-		else if (cnt_for_high_voltage_time == 1) begin
-			cnt_for_high_voltage_time <= cnt_for_high_voltage_time - 1;
-//			high_voltage_time_end <= 1;
-			is_high_voltage_time <= 1;
-		end
-		else begin
-//			high_voltage_time_end <= 0;
-			is_high_voltage_time <= 0;
-		end
-	
-	end
-
-	/**
-	 * recv_complete下降沿缓存cache_line_sdata数据到cache2_line_sdata并开始高电压时间计时
-	 */
-	reg [CHANNEL_NUM_MINUS_1:0] cache2_line_sdata;
-	always @(posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			enable_count_high_voltage_time <= 0;
-			cache2_line_sdata <= ~0;
-		end
-		else if (total_fault_flag) begin
-			enable_count_high_voltage_time <= 0;
-			cache2_line_sdata <= ~0;
-		end
-		else if (recv_complete) begin
-			enable_count_high_voltage_time <= 1;
-			cache2_line_sdata <= cache_line_sdata;
-		end
-		else begin
-			enable_count_high_voltage_time <= 0;
-		end
-		
-	end
-	
-	/**
-	 * 高电压时间内(is_high_voltage_time高电平时)，按cache2_line_sdata打开所需高电压；高电压时间后关闭
-	 * 按cache2_line_sdata打开低电压
-	 * total_fault_flag会关闭所有喷阀
-	 */
-	always @ (posedge sys_clk or negedge rst_n) begin
-		if (!rst_n) begin
-			signal_low_voltage <= ~0;
-			signal_high_voltage <= ~0;
-		end
-		else if (total_fault_flag) begin
-			signal_low_voltage <= ~0;
-			signal_high_voltage <= ~0;
-		end
-		else if (is_high_voltage_time) begin
-			signal_high_voltage <= cache2_line_sdata;
-			signal_low_voltage <= cache2_line_sdata;
-		end
-		else begin
-			signal_high_voltage <= ~0;
-			signal_low_voltage <= cache2_line_sdata;
-		end
-	end
-	
-endmodule
-      
--- a/hardware/Job.OutJob
+++ b/hardware/Job.OutJob
@ -0,0 +1,163 @@
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+OutputType2=Gerber
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+OutputEnabled2=1
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+OutputVariantName3=
+OutputEnabled3=1
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+OutputName4=ValveBoard_bom
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+OutputDocumentPath4=
+OutputVariantName4=
+OutputEnabled4=1
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+Configuration4_Name1=ColumnNameFormat
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+Configuration4_Item2=OpenExported=False|AddToProject=False|ReportBOMViolationsInMessages=False|ForceFit=False|NotFitted=False|Database=False|DatabasePriority=False|IncludePcbData=False|IncludeVaultData=False|IncludeCloudData=False|IncludeDocumentData=True|IncludeAlternatives=False|ShowExportOptions=True|TemplateFilename=|TemplateVaultGuid=|TemplateItemGuid=|TemplateRevisionGuid=|BatchMode=5|FormWidth=1200|FormHeight=710|SupplierProdQty=1|SupplierAutoQty=False|SupplierUseCachedPricing=False|SupplierCurrency=USD|SolutionsPerItem=1|SuppliersPerSolution=1|ViewType=0|UseDirectApi=False|BomSetName=
+Configuration4_Name3=GroupOrder
+Configuration4_Item3=Comment=True|Footprint=True|value=True|voltage=True
+Configuration4_Name4=SortOrder
+Configuration4_Item4=Designator=Up|Comment=Up|Footprint=Up
+Configuration4_Name5=VisibleOrder
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+Configuration4_Name6=VisibleOrder_Flat
+Configuration4_Item6=Designator=120|Comment=120|value=100|voltage=100|frequency=100|Footprint=120|LibRef=120|Quantity=120|Manufacturer Part Number 1=100
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+OutputVariantName5=
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+OutputType6=Schematic Print
+OutputName6=ValveBoard_sch
+OutputCategory6=Documentation
+OutputDocumentPath6=
+OutputVariantName6=
+OutputEnabled6=0
+OutputEnabled6_OutputMedium1=2
+OutputEnabled6_OutputMedium2=0
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+Configuration6_Name1=OutputConfigurationParameter1
+Configuration6_Item1=Record=SchPrintView|ShowNoERC=True|ShowParamSet=True|ShowProbe=True|ShowBlanket=True|NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle|ShowNote=True|ShowNoteCollapsed=True|ShowOpenEnds=True|ExpandDesignator=True|ExpandNetLabel=False|ExpandPort=False|ExpandSheetNum=False|ExpandDocNum=False|PrintArea=0|PrintAreaRect.X1=0|PrintAreaRect.Y1=0|PrintAreaRect.X2=0|PrintAreaRect.Y2=0|DocumentPath=All SCH Documents
+
+[PublishSettings]
+OutputFilePath1=C:\Users\guoyr\Desktop\valveboard\hardware\out\
+ReleaseManaged1=0
+OutputBasePath1=out\
+OutputPathMedia1=
+OutputPathMediaValue1=
+OutputPathOutputer1=
+OutputPathOutputerPrefix1=
+OutputPathOutputerValue1=
+OutputFileName1=Job1.PDF
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+OutputPathOutputerValue2=
+OutputFileName2=
+OutputFileNameMulti2=
+UseOutputNameForMulti2=1
+OutputFileNameSpecial2=
+OpenOutput2=0
+
+[GeneratedFilesSettings]
+RelativeOutputPath1=C:\Users\guoyr\Desktop\valveboard\hardware\out\
+OpenOutputs1=0
+RelativeOutputPath2=C:\Users\guoyr\Desktop\valveboard\hardware\out\
+OpenOutputs2=0
+AddToProject2=0
+TimestampFolder2=0
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+OpenNCDrillOutput2=0
+OpenIPCOutput2=0
+EnableReload2=0
+
--- a/hardware/README.assets/image-20211121225906720.png
+++ b/hardware/README.assets/image-20211121225906720.png
--- a/hardware/README.assets/image-20220519222236422.png
+++ b/hardware/README.assets/image-20220519222236422.png
--- a/hardware/README.md
+++ b/hardware/README.md
@ -1,17 +1,11 @@
 # 阀板硬件

-相对于以前v1.1版本，终于，**改成超六类屏蔽网线通信了**，这是为了改善通信质量，并没有用网络相关的协议
-
-这个文件夹下是丁坤画的48路阀板的原理图和PCB，用于烟梗分选机。整个机器用了六块48路阀板，驱动200路喷嘴，阀的型号是合肥旭伟电子气动有限公司的XW-F16，这个阀一个可以连接并控制16个喷嘴。
+这个文件夹下是48路阀板的原理图和PCB，用于烟梗分选机。整个机器用了六块48路阀板，驱动256路喷嘴，阀的型号是合肥旭伟电子气动有限公司的XW-F16，这个阀一个可以连接并控制16个喷嘴。每个阀的电阻是14欧姆，高压启动时峰值电流约1.5A，低压保持电流约0.8A。

 ![image-20211226143651047](README.assets/image-20211226143651047.png)

-**下面的说明仅针对丁坤画的阀板v1.2，丁坤的阀板简化了供电，添加了不同的接口，但总体思路是一样的**，此外丁坤和汪学良的阀板引脚分配并不相同，具体见阀板程序`../firmware`。
-
 ## 概述

-**汪学良的板子供电数量和标号与下面所述的丁坤阀板v1.2稍有不同，非粗体字体是对丁坤板子的说明，请留意。**
-
 48个电磁阀连接在顶部的12个接口上，当接口上有电压时电流流过电磁阀，电磁阀打开。由于电磁阀工作需要大电流大电压且为感性器件，容易影响发出控制信号的CPLD芯片，因此需要独立且隔离的电源，这个电源标为`LOW`，参考为`PGND`。为加快电磁阀开启，在开启瞬间会输出一个高电压，这是另一个独立的电源，标为`HIGH`，参考也为`PGND`。这个高电压会在电磁阀开启后被断开，随后施加标号为`LOW`的保持电压，用来保持电磁阀的打开状态。需要电磁阀关闭则切断保持电压。

 上面的过程由光耦隔离驱动端MOS和控制芯片CPLD，提供给光耦输出端的电压标号为`+12V`，参考为`PGND`。
@ -31,31 +25,13 @@ CPLD为控制芯片，接收外部信号并将控制信号输出到板上的光
 | DGND | 0V      |
 | +12V | 12V     |

-**本次所用的阀板加速开启用的高电压为直流100V、保持用的低电压为直流12V，另有光耦、CPLD等的弱电供电。**
-
-下面是阀板正面视图。
-
-![image-20220519222236422](./README.assets/image-20220519222236422.png)
-
-## 通信接口
-
-**下面非粗体字体是丁坤的阀板v1.2说明，请注意**
-
-
-
-![image-20211121225906720](README.assets/image-20211121225906720.png)
-
-`LVDS`的接口的信号是遵循通信协议的LVDS信号，注意虽然看起来像网口，实则为LVDS信号，具体引脚定义自行看原理图。
-
-## 版号
-
-**下面非粗体字体是丁坤的阀板v1.2说明，需要注意的是，版号没有意义，CPLD中程序目前不识别**
+本次所用的阀板加速开启用的高电压为直流100V、保持用的低电压为直流12V

 ## 调试

 **版号**

-在`MB VER.`丝印标志的区域有`S1`、`S2`、`S3`、`S4`标注的0欧电阻焊接位，按`0`、`1`标注焊接即可，注意0和1不能都焊。这个设置是为阀板级联做的冗余。
+在`INFO`丝印标志的区域有`S1`、`S2`、`S3`、`S4`标注的0欧电阻焊接位，按`0`、`1`标注焊接即可，注意0和1不能都焊。这个设置是为阀板级联做的冗余。

 **烧录**

@ -63,22 +39,56 @@ CPLD烧录口为简牛口，用USB Blaster烧录的，开发软件为Quartus。

 **观察开关量**

-在正面那排光耦前有LED焊接位可以焊接上LED，打开的阀门那一路对应的LED亮，当然注意重新计算和焊接所需的串联限流电阻
+在正面那排光耦前有LED，打开的阀门那一路对应的LED亮。选用LED和串联限流电阻时，查看[issue#2](https://github.com/NanjingForestryUniversity/valveboard/issues/2)

 **电源**

-数字电源输入为12V，在板子上转换为3.3V，网络标号+3.3V，为防止电磁阀上电瞬间直接误动作，因此给光耦电源加入RC延时电路，输出标号为+3.3VGG，按设计延时约500ms，这个时间远大于CPLD初始化开始工作的时间，因此电磁阀上电瞬间不会误动作。
-
-数字电源输入附近`3.3V`的LED亮不代表真的就是3.3V，也许是12V直接短路到了网络上。右上角电源接口附近的灯指示输入的电压。另外板子上有大量保险丝，包括右上角附近的两个黑色壳子，里面打开也是保险丝。
+数字电源输入为12V，在板子上转换为3.3V，网络标号+3.3V，为防止电磁阀上电瞬间直接误动作，因此给光耦电源加入RC延时电路，输出标号为+3.3VGG，按设计延时约500ms，这个时间远大于CPLD初始化开始工作的时间，因此电磁阀上电瞬间不会误动作。此外还添加了防反接保护，查看[issue#3](https://github.com/NanjingForestryUniversity/valveboard/issues/3)

 ## 生产制造

-所需器件BOM里都有，板子开窗部分要加锡，钢网上已经体现了
+所需器件BOM里都有，板子开窗部分要加锡，钢网上已经体现了。测试板子是嘉立创做的，SMT也是嘉立创，直插元件和芯片需手焊

-测试板子是嘉立创做的，SMT也是嘉立创，直插元件和芯片需手焊
+## Changelog
+### v1.0 

-## 其他信息
+绿色的阀板，测试版本，继承于远古的原理图和布局

-板子上标有CE、FC、WEEE等认证，这些都是随手放上去的，完全没有进行过这些认证。如果要了解板子工作原理，自行看原理图，原理图内的标号命名来自于老阀板，很让人不知所措，要有耐心才能看下去
+### v1.1
+
+蓝色的阀板，过奕任选型和画原理图，丁坤layout，具有ISO、LVDS、TTL接口，见[b01-h1.1-p1.1-f1.1](https://github.com/NanjingForestryUniversity/valveboard/releases/tag/b01-h1.1-p1.1-f1.1)
+
+### v1.2
+
+黄色的阀板，过奕任画原理图和layout，见 [b02-h1.2-p1.1-f1.2](https://github.com/NanjingForestryUniversity/valveboard/releases/tag/b02-h1.2-p1.1-f1.2)
+
+- 采用带屏蔽的超六类RJ45端口代替原来的牛角座，增强了通信的稳定性
+- 删除了ISO（隔离）端口
+- 删除了LVDS的BYPASS端口
+- 删除了TTL端口
+- 修改电磁喷阀的接口为更容易买到的器件，[器件详情](https://detail.tmall.com/item.htm?spm=a230r.1.14.52.2b5b4e50D2a4NS&id=633917290163&ns=1&abbucket=5&skuId=4696862330457)
+- 增加了光隔数字部分电源的延迟上电电路，避免启动瞬间喷阀动作
+- 修改了1N4148的封装为SOD-123，方便SMT
+- 略微优化了板子尺寸，调整了安装孔位置和个数
+
+### v1.3
+
+绿色的阀板，过奕任画原理图和layout，见[b02-h1.3-p1.1-f1.3](https://github.com/NanjingForestryUniversity/valveboard/releases/tag/b02-h1.3-p1.1-f1.3)
+
+- 重画了原理图和PCB，PCB尺寸减小
+- 增大阻容器件封装，解决100V耐压风险，[issue#1](https://github.com/NanjingForestryUniversity/valveboard/issues/1)
+- LED改为黄绿色，[issue#2](https://github.com/NanjingForestryUniversity/valveboard/issues/2)
+- 添加了数字电源防反接，[issue#3](https://github.com/NanjingForestryUniversity/valveboard/issues/3)
+- 取消了所有保险丝
+- 增加了每一路的标识丝印，南林的徽标
+- 重新排列了阀的连接器，方便插拔
+- 有需要的线路上增加了开窗，提高载流能力
+
+## 作者
+
+[过奕任](https://github.com/3703781)和丁坤一起设计了电路，画了板子。欢迎提[issue](https://github.com/NanjingForestryUniversity/valveboard/issues)，bug随缘解决。
+
+丁坤2019年入学时就被师兄叫去焊接汪学良的阀板，后来和过奕任接替师兄做了这个仓库里的阀板。丁坤已经毕业，但也很乐意解答关于板子的所有问题。丁坤QQ1091546069、丁坤电话17761700156。
+
+过奕任2020年入学，目前正打算找其他人接管这个库，毕业了就不要找他，但永远可以找丁坤。

-丁坤2019年9月入学、丁坤QQ1091546069、丁坤电话17761700156，他刚入学时就被师兄叫去焊接汪学良的阀板，后来接替师兄做了这个仓库里的阀板，无论有没有毕业，都很乐意解答关于板子的所有问题
--- a/hardware/VALVEBOARD.PCBDwf
+++ b/hardware/VALVEBOARD.PCBDwf
--- a/hardware/ValveBoard
+++ b/hardware/ValveBoard
@ -1,7 +1,7 @@
 [Design]
 Version=1.0
 HierarchyMode=0
-ChannelRoomNamingStyle=0
+ChannelRoomNamingStyle=2
 ReleasesFolder=
 ChannelDesignatorFormatString=$Component_$RoomName
 ChannelRoomLevelSeperator=_
@ -13,7 +13,7 @@ TemplateLocationPath=
 PinSwapBy_Netlabel=1
 PinSwapBy_Pin=1
 AllowPortNetNames=0
-AllowSheetEntryNetNames=1
+AllowSheetEntryNetNames=0
 AppendSheetNumberToLocalNets=0
 NetlistSinglePinNets=0
 DefaultConfiguration=Sources
@ -21,19 +21,17 @@ UserID=0xFFFFFFFF
 DefaultPcbProtel=1
 DefaultPcbPcad=0
 ReorderDocumentsOnCompile=1
-NameNetsHierarchically=0
+NameNetsHierarchically=1
 PowerPortNamesTakePriority=0
 AutoSheetNumbering=1
 AutoCrossReferences=0
-NewIndexingOfSheetSymbols=0
 PushECOToAnnotationFile=1
 DItemRevisionGUID=
 ReportSuppressedErrorsInMessages=0
 FSMCodingStyle=eFMSDropDownList_OneProcess
 FSMEncodingStyle=eFMSDropDownList_OneHot
 IsProjectConflictPreventionWarningsEnabled=0
-IsVirtualBomDocumentRemoved=0
-OutputPath=
+OutputPath=Project Outputs for ValveBoard - Copy
 LogFolderPath=
 ManagedProjectGUID=FC1EC5C6-BF66-4CE3-84B0-9B348172F064
 VaultGUID=9B77029D-195C-4D13-89B3-25CAE3B381CD
@ -46,7 +44,7 @@ PrefsVaultGUID=
 PrefsRevisionGUID=

 [Document1]
-DocumentPath=sch\VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc
+DocumentPath=sch\VALVEBOARD_Controller.SchDoc
 AnnotationEnabled=1
 AnnotateStartValue=1
 AnnotationIndexControlEnabled=0
@ -55,8 +53,8 @@ AnnotateScope=All
 AnnotateOrder=0
 DoLibraryUpdate=0
 DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=0
-ClassGenCCAutoRoomEnabled=0
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
 ClassGenNCAutoScope=None
 DItemRevisionGUID=
 GenerateClassCluster=0
@ -128,11 +126,11 @@ ClassGenCCAutoRoomEnabled=1
 ClassGenNCAutoScope=None
 DItemRevisionGUID=
 GenerateClassCluster=0
-DocumentUniqueId=HIODHQLZ
+DocumentUniqueId=DTFHISHF

 [Document6]
 DocumentPath=sch\VALVEBOARD_Isolation.SchDoc
-AnnotationEnabled=0
+AnnotationEnabled=1
 AnnotateStartValue=1
 AnnotationIndexControlEnabled=0
 AnnotateSuffix=
@ -140,16 +138,16 @@ AnnotateScope=All
 AnnotateOrder=1
 DoLibraryUpdate=0
 DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=0
-ClassGenCCAutoRoomEnabled=0
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
 ClassGenNCAutoScope=None
 DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=GIPQYHBD

 [Document7]
-DocumentPath=sch\VALVEBOARD_ValvePower_ValveInterface.SchDoc
-AnnotationEnabled=0
+DocumentPath=sch\VALVEBOARD_ValveInterface.SchDoc
+AnnotationEnabled=1
 AnnotateStartValue=1
 AnnotationIndexControlEnabled=0
 AnnotateSuffix=
@ -157,16 +155,16 @@ AnnotateScope=All
 AnnotateOrder=2
 DoLibraryUpdate=0
 DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=0
-ClassGenCCAutoRoomEnabled=0
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
 ClassGenNCAutoScope=None
 DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=WSQZKVKS

 [Document8]
-DocumentPath=sch\VALVEBOARD_ValveDrive1.SchDoc
-AnnotationEnabled=0
+DocumentPath=sch\VALVEBOARD_ValveDrive.SchDoc
+AnnotationEnabled=1
 AnnotateStartValue=1
 AnnotationIndexControlEnabled=0
 AnnotateSuffix=
@ -174,8 +172,8 @@ AnnotateScope=All
 AnnotateOrder=3
 DoLibraryUpdate=1
 DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=0
-ClassGenCCAutoRoomEnabled=0
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
 ClassGenNCAutoScope=None
 DItemRevisionGUID=
 GenerateClassCluster=0
@ -216,58 +214,7 @@ GenerateClassCluster=0
 DocumentUniqueId=SPCOHXLI

 [Document11]
-DocumentPath=sch\VALVEBOARD_ValveDrive2.SchDoc
-AnnotationEnabled=0
-AnnotateStartValue=1
-AnnotationIndexControlEnabled=0
-AnnotateSuffix=
-AnnotateScope=All
-AnnotateOrder=4
-DoLibraryUpdate=1
-DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=0
-ClassGenCCAutoRoomEnabled=0
-ClassGenNCAutoScope=None
-DItemRevisionGUID=
-GenerateClassCluster=0
-DocumentUniqueId=JHBEPRGI
-
-[Document12]
-DocumentPath=sch\VALVEBOARD_ValveDrive3.SchDoc
-AnnotationEnabled=0
-AnnotateStartValue=1
-AnnotationIndexControlEnabled=0
-AnnotateSuffix=
-AnnotateScope=All
-AnnotateOrder=5
-DoLibraryUpdate=1
-DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=0
-ClassGenCCAutoRoomEnabled=0
-ClassGenNCAutoScope=None
-DItemRevisionGUID=
-GenerateClassCluster=0
-DocumentUniqueId=JYBDHIJB
-
-[Document13]
-DocumentPath=sch\VALVEBOARD_ValveDrive4.SchDoc
-AnnotationEnabled=0
-AnnotateStartValue=1
-AnnotationIndexControlEnabled=0
-AnnotateSuffix=
-AnnotateScope=All
-AnnotateOrder=6
-DoLibraryUpdate=1
-DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=0
-ClassGenCCAutoRoomEnabled=0
-ClassGenNCAutoScope=None
-DItemRevisionGUID=
-GenerateClassCluster=0
-DocumentUniqueId=CVFQPNCY
-
-[Document14]
-DocumentPath=pcb\kunkun.PcbDoc
+DocumentPath=VALVEBOARD.PCBDwf
 AnnotationEnabled=1
 AnnotateStartValue=1
 AnnotationIndexControlEnabled=0
@ -281,10 +228,61 @@ ClassGenCCAutoRoomEnabled=1
 ClassGenNCAutoScope=None
 DItemRevisionGUID=
 GenerateClassCluster=0
-DocumentUniqueId=KQERGAOO
+DocumentUniqueId=
+
+[Document12]
+DocumentPath=sch\ValveBoard - Copy.BomDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=-1
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=
+
+[Document13]
+DocumentPath=sch\VALVEBOARD_DigitalPower.SchDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=10
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=EMRBZHBW
+
+[Document14]
+DocumentPath=sch\VALVEBOARD_ValvePower.SchDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=8
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=OQODMHEX

 [Document15]
-DocumentPath=kunkun.PCBDwf
+DocumentPath=sch\VALVEBOARD_Isolation.Harness
 AnnotationEnabled=1
 AnnotateStartValue=1
 AnnotationIndexControlEnabled=0
@ -301,7 +299,24 @@ GenerateClassCluster=0
 DocumentUniqueId=

 [Document16]
-DocumentPath=sch\ValveBoard - Copy.BomDoc
+DocumentPath=sch\VALVEBOARD_PostIsolation.SchDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=9
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=PROZNUNI
+
+[Document17]
+DocumentPath=sch\VALVEBOARD_PostIsolation.Harness
 AnnotationEnabled=1
 AnnotateStartValue=1
 AnnotationIndexControlEnabled=0
@ -317,6 +332,108 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=

+[Document18]
+DocumentPath=sch\VALVEBOARD_Top.SchDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=11
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=HWMDVIPF
+
+[Document19]
+DocumentPath=sch\VALVEBOARD_DigitalInterface.SchDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=12
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=QSAMXHCO
+
+[Document20]
+DocumentPath=sch\VALVEBOARD_Controller.Harness
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=-1
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=
+
+[Document21]
+DocumentPath=sch\VALVEBOARD_DigitalInterface.Harness
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=-1
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=
+
+[Document22]
+DocumentPath=Job.OutJob
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=-1
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=
+
+[Document23]
+DocumentPath=pcb\VALVEBOARD_Kun.PcbDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=-1
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=XRFYHIXV
+
 [Configuration1]
 Name=Sources
 ParameterCount=0
@ -353,18 +470,18 @@ SCH_ShowBlankets=-1
 SCH_NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle
 SCH_ShowNote=-1
 SCH_ShowNoteCollapsed=-1
-SCH_ExpandLogicalToPhysical=0
+SCH_ExpandLogicalToPhysical=-1
 SCH_VariantName=[No Variations]
 SCH_ExpandComponentDesignators=-1
-SCH_ExpandNetlabels=0
-SCH_ExpandPorts=0
-SCH_ExpandSheetNumber=0
-SCH_ExpandDocumentNumber=0
+SCH_ExpandNetlabels=-1
+SCH_ExpandPorts=-1
+SCH_ExpandSheetNumber=-1
+SCH_ExpandDocumentNumber=-1
 SCH_HasExpandLogicalToPhysicalSheets=-1
 SaveSettingsToOutJob=0

 [Generic_EDE]
-OutputDir=
+OutputDir=Project Outputs for ValveBoard - Copy

 [OutputGroup1]
 Name=Netlist Outputs
@ -381,11 +498,101 @@ OutputName2=PADS ASCII Netlist
 OutputDocumentPath2=
 OutputVariantName2=
 OutputDefault2=0
+OutputType3=CadnetixNetlist
+OutputName3=Cadnetix Netlist
+OutputDocumentPath3=
+OutputVariantName3=
+OutputDefault3=0
+OutputType4=CalayNetlist
+OutputName4=Calay Netlist
+OutputDocumentPath4=
+OutputVariantName4=
+OutputDefault4=0
+OutputType5=EDIF
+OutputName5=EDIF for PCB
+OutputDocumentPath5=
+OutputVariantName5=
+OutputDefault5=0
+OutputType6=EESofNetlist
+OutputName6=EESof Netlist
+OutputDocumentPath6=
+OutputVariantName6=
+OutputDefault6=0
+OutputType7=IntergraphNetlist
+OutputName7=Intergraph Netlist
+OutputDocumentPath7=
+OutputVariantName7=
+OutputDefault7=0
+OutputType8=MentorBoardStationNetlist
+OutputName8=Mentor BoardStation Netlist
+OutputDocumentPath8=
+OutputVariantName8=
+OutputDefault8=0
+OutputType9=MultiWire
+OutputName9=MultiWire
+OutputDocumentPath9=
+OutputVariantName9=
+OutputDefault9=0
+OutputType10=OrCadPCB2Netlist
+OutputName10=Orcad/PCB2 Netlist
+OutputDocumentPath10=
+OutputVariantName10=
+OutputDefault10=0
+OutputType11=Pcad
+OutputName11=Pcad for PCB
+OutputDocumentPath11=
+OutputVariantName11=
+OutputDefault11=0
+OutputType12=PCADnltNetlist
+OutputName12=PCADnlt Netlist
+OutputDocumentPath12=
+OutputVariantName12=
+OutputDefault12=0
+OutputType13=Protel2Netlist
+OutputName13=Protel2 Netlist
+OutputDocumentPath13=
+OutputVariantName13=
+OutputDefault13=0
+OutputType14=ProtelNetlist
+OutputName14=Protel
+OutputDocumentPath14=
+OutputVariantName14=
+OutputDefault14=0
+OutputType15=RacalNetlist
+OutputName15=Racal Netlist
+OutputDocumentPath15=
+OutputVariantName15=
+OutputDefault15=0
+OutputType16=RINFNetlist
+OutputName16=RINF Netlist
+OutputDocumentPath16=
+OutputVariantName16=
+OutputDefault16=0
+OutputType17=SciCardsNetlist
+OutputName17=SciCards Netlist
+OutputDocumentPath17=
+OutputVariantName17=
+OutputDefault17=0
+OutputType18=TangoNetlist
+OutputName18=Tango Netlist
+OutputDocumentPath18=
+OutputVariantName18=
+OutputDefault18=0
+OutputType19=TelesisNetlist
+OutputName19=Telesis Netlist
+OutputDocumentPath19=
+OutputVariantName19=
+OutputDefault19=0
+OutputType20=WireListNetlist
+OutputName20=WireList Netlist
+OutputDocumentPath20=
+OutputVariantName20=
+OutputDefault20=0

 [OutputGroup2]
 Name=Simulator Outputs
 Description=
-TargetPrinter=Microsoft XPS Document Writer
+TargetPrinter=\\Desktop-k75ippc\HP LaserJet Professional M1136 MFP
 PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1

 [OutputGroup3]
@ -399,6 +606,30 @@ OutputDocumentPath1=
 OutputVariantName1=
 OutputDefault1=0
 PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
+Configuration1_Name1=OutputConfigurationParameter1
+Configuration1_Item1=DesignatorDisplayMode=Physical|PrintArea=DesignExtent|PrintAreaLowerLeftCornerX=0|PrintAreaLowerLeftCornerY=0|PrintAreaUpperRightCornerX=0|PrintAreaUpperRightCornerY=0|Record=PcbPrintView|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name2=OutputConfigurationParameter2
+Configuration1_Item2=IncludeBoardCutouts=False|IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|IncludeViewports=True|Index=0|Mirror=False|Name=Multilayer Composite Print|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name3=OutputConfigurationParameter3
+Configuration1_Item3=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopOverlay|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name4=OutputConfigurationParameter4
+Configuration1_Item4=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name5=OutputConfigurationParameter5
+Configuration1_Item5=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=BottomLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name6=OutputConfigurationParameter6
+Configuration1_Item6=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=MultiLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name7=OutputConfigurationParameter7
+Configuration1_Item7=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=BottomOverlay|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name8=OutputConfigurationParameter8
+Configuration1_Item8=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=KeepOutLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name9=OutputConfigurationParameter9
+Configuration1_Item9=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical1|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name10=OutputConfigurationParameter10
+Configuration1_Item10=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical2|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name11=OutputConfigurationParameter11
+Configuration1_Item11=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical13|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
+Configuration1_Name12=OutputConfigurationParameter12
+Configuration1_Item12=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|DrillType=Regular|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical15|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer|DocumentPath=C:\Users\guoyr\Desktop\valveboard\hardware\sch\VALVEBOARD_Kun.PcbDoc
 OutputType2=PCB 3D Print
 OutputName2=PCB 3D Print
 OutputDocumentPath2=
@ -449,11 +680,23 @@ OutputDocumentPath9=
 OutputVariantName9=
 OutputDefault9=0
 PageOptions9=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
+OutputType10=PDF3D
+OutputName10=PDF3D
+OutputDocumentPath10=
+OutputVariantName10=[No Variations]
+OutputDefault10=0
+PageOptions10=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
+OutputType11=PDF3D MBA
+OutputName11=PDF3D MBA
+OutputDocumentPath11=
+OutputVariantName11=
+OutputDefault11=0
+PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9

 [OutputGroup4]
 Name=Assembly Outputs
 Description=
-TargetPrinter=HP LaserJet Professional M1136 MFP
+TargetPrinter=\\Desktop-k75ippc\HP LaserJet Professional M1136 MFP
 PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
 OutputType1=Assembly
 OutputName1=Assembly Drawings
@ -511,7 +754,7 @@ OutputDefault3=0
 [OutputGroup5]
 Name=Fabrication Outputs
 Description=
-TargetPrinter=HP LaserJet Professional M1136 MFP
+TargetPrinter=\\Desktop-k75ippc\HP LaserJet Professional M1136 MFP
 PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
 OutputType1=NC Drill
 OutputName1=NC Drill Files
@ -848,6 +1091,21 @@ OutputName8=Specctra Design PCB
 OutputDocumentPath8=
 OutputVariantName8=
 OutputDefault8=0
+OutputType9=ExportIDF
+OutputName9=Export IDF
+OutputDocumentPath9=
+OutputVariantName9=
+OutputDefault9=0
+OutputType10=MBAExportPARASOLID
+OutputName10=Export PARASOLID
+OutputDocumentPath10=
+OutputVariantName10=
+OutputDefault10=0
+OutputType11=MBAExportSTEP
+OutputName11=Export STEP
+OutputDocumentPath11=
+OutputVariantName11=
+OutputDefault11=0

 [OutputGroup10]
 Name=PostProcess Outputs
@ -1177,7 +1435,6 @@ Type122=2
 Type123=1
 Type124=1
 Type125=1
-Type126=1

 [ERC Connection Matrix]
 L1=NNNNNNNNNNNWNNNWW
@ -1215,7 +1472,7 @@ CompClassManualEnabled=0
 CompClassManualRoomEnabled=0
 NetClassAutoBusEnabled=1
 NetClassAutoCompEnabled=0
-NetClassAutoNamedHarnessEnabled=0
+NetClassAutoNamedHarnessEnabled=1
 NetClassManualEnabled=1
 NetClassSeparateForBusSections=0

--- a/Copy.PrjPcbStructure
+++ b/Copy.PrjPcbStructure
@ -1,7 +1,23 @@
-Record=TopLevelDocument|FileName=VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc|SheetNumber=1
-Record=NoMainPathDocument|SourceDocument=VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc|FileName=VALVEBOARD_Isolation.SchDoc|SheetNumber=2
-Record=NoMainPathDocument|SourceDocument=VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc|FileName=VALVEBOARD_ValveDrive1.SchDoc|SheetNumber=4
-Record=NoMainPathDocument|SourceDocument=VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc|FileName=VALVEBOARD_ValveDrive2.SchDoc|SheetNumber=5
-Record=NoMainPathDocument|SourceDocument=VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc|FileName=VALVEBOARD_ValveDrive3.SchDoc|SheetNumber=6
-Record=NoMainPathDocument|SourceDocument=VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc|FileName=VALVEBOARD_ValveDrive4.SchDoc|SheetNumber=7
-Record=NoMainPathDocument|SourceDocument=VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc|FileName=VALVEBOARD_ValvePower_ValveInterface.SchDoc|SheetNumber=3
+Record=TopLevelDocument|FileName=VALVEBOARD_Top.SchDoc|SheetNumber=1
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=Controller|SchDesignator=Controller|FileName=VALVEBOARD_Controller.SchDoc|SheetNumber=2|SymbolType=Normal|RawFileName=VALVEBOARD_Controller.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=DigitalInterface|SchDesignator=DigitalInterface|FileName=VALVEBOARD_DigitalInterface.SchDoc|SheetNumber=9|SymbolType=Normal|RawFileName=VALVEBOARD_DigitalInterface.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=DigitalPower|SchDesignator=DigitalPower|FileName=VALVEBOARD_DigitalPower.SchDoc|SheetNumber=3|SymbolType=Normal|RawFileName=VALVEBOARD_DigitalPower.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation1|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation2|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation3|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation4|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation5|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation6|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation7|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation8|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation9|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation10|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation11|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=PostIsolation12|SchDesignator=Repeat(PostIsolation,1,12)|FileName=VALVEBOARD_PostIsolation.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=VALVEBOARD_PostIsolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_Top.SchDoc|Designator=ValvePower|SchDesignator=ValvePower|FileName=VALVEBOARD_ValvePower.SchDoc|SheetNumber=4|SymbolType=Normal|RawFileName=VALVEBOARD_ValvePower.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_PostIsolation.SchDoc|Designator=Drive1|SchDesignator=Repeat(Drive,1,4)|FileName=VALVEBOARD_ValveDrive.SchDoc|SheetNumber=8|SymbolType=Normal|RawFileName=VALVEBOARD_ValveDrive.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_PostIsolation.SchDoc|Designator=Drive2|SchDesignator=Repeat(Drive,1,4)|FileName=VALVEBOARD_ValveDrive.SchDoc|SheetNumber=8|SymbolType=Normal|RawFileName=VALVEBOARD_ValveDrive.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_PostIsolation.SchDoc|Designator=Drive3|SchDesignator=Repeat(Drive,1,4)|FileName=VALVEBOARD_ValveDrive.SchDoc|SheetNumber=8|SymbolType=Normal|RawFileName=VALVEBOARD_ValveDrive.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_PostIsolation.SchDoc|Designator=Drive4|SchDesignator=Repeat(Drive,1,4)|FileName=VALVEBOARD_ValveDrive.SchDoc|SheetNumber=8|SymbolType=Normal|RawFileName=VALVEBOARD_ValveDrive.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_PostIsolation.SchDoc|Designator=Interface|SchDesignator=Interface|FileName=VALVEBOARD_ValveInterface.SchDoc|SheetNumber=7|SymbolType=Normal|RawFileName=VALVEBOARD_ValveInterface.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
+Record=SheetSymbol|SourceDocument=VALVEBOARD_PostIsolation.SchDoc|Designator=Isolation|SchDesignator=Isolation|FileName=VALVEBOARD_Isolation.SchDoc|SheetNumber=6|SymbolType=Normal|RawFileName=VALVEBOARD_Isolation.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
--- a/hardware/kunkun.PCBDwf
+++ b/hardware/kunkun.PCBDwf
--- a/hardware/lib/zynq.PcbLib
+++ b/hardware/lib/zynq.PcbLib
--- a/hardware/lib/zynq.SchLib
+++ b/hardware/lib/zynq.SchLib
--- a/hardware/out/ValveBoard_assembly_v1.2.pdf
+++ b/hardware/out/ValveBoard_assembly_v1.2.pdf
--- a/hardware/out/ValveBoard_bom_v1.2.xls
+++ b/hardware/out/ValveBoard_bom_v1.2.xls
--- a/hardware/out/ValveBoard_gerber_v1.2.zip
+++ b/hardware/out/ValveBoard_gerber_v1.2.zip
--- a/hardware/out/ValveBoard_pnp_v1.2.csv
+++ b/hardware/out/ValveBoard_pnp_v1.2.csv
--- a/hardware/out/ValveBoard_sch_v1.2.pdf
+++ b/hardware/out/ValveBoard_sch_v1.2.pdf
--- a/hardware/pcb/VALVEBOARD_Kun.PcbDoc
+++ b/hardware/pcb/VALVEBOARD_Kun.PcbDoc
--- a/hardware/pcb/kunkun.PCBDwf
+++ b/hardware/pcb/kunkun.PCBDwf
--- a/hardware/pcb/kunkun.PcbDoc
+++ b/hardware/pcb/kunkun.PcbDoc
--- a/hardware/res/nfu.svg
+++ b/hardware/res/nfu.svg
--- a/hardware/sch/VALVEBOARD_Controller.Harness
+++ b/hardware/sch/VALVEBOARD_Controller.Harness
@ -0,0 +1 @@
+SKUN=SDATA,SCLK,SEN
--- a/hardware/sch/VALVEBOARD_Controller.SchDoc
+++ b/hardware/sch/VALVEBOARD_Controller.SchDoc
--- a/hardware/sch/VALVEBOARD_DigitalInterface.Harness
+++ b/hardware/sch/VALVEBOARD_DigitalInterface.Harness
@ -0,0 +1 @@
+SKUN=SDATA,SCLK,SEN
--- a/hardware/sch/VALVEBOARD_DigitalInterface.SchDoc
+++ b/hardware/sch/VALVEBOARD_DigitalInterface.SchDoc
--- a/hardware/sch/VALVEBOARD_DigitalPower.SchDoc
+++ b/hardware/sch/VALVEBOARD_DigitalPower.SchDoc
--- a/hardware/sch/VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc
+++ b/hardware/sch/VALVEBOARD_DigitalPower_DigitalInterface_Controller.SchDoc
--- a/hardware/sch/VALVEBOARD_Isolation.Harness
+++ b/hardware/sch/VALVEBOARD_Isolation.Harness
@ -0,0 +1 @@
+ISO_4D=D4,D3,D2,D1
--- a/hardware/sch/VALVEBOARD_Isolation.SchDoc
+++ b/hardware/sch/VALVEBOARD_Isolation.SchDoc
--- a/hardware/sch/VALVEBOARD_PostIsolation.Harness
+++ b/hardware/sch/VALVEBOARD_PostIsolation.Harness
@ -0,0 +1 @@
+ISO_4D=D1,D2,D3,D4
--- a/hardware/sch/VALVEBOARD_PostIsolation.SchDoc
+++ b/hardware/sch/VALVEBOARD_PostIsolation.SchDoc
--- a/hardware/sch/VALVEBOARD_Top.SchDoc
+++ b/hardware/sch/VALVEBOARD_Top.SchDoc
--- a/hardware/sch/VALVEBOARD_ValveDrive.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValveDrive.SchDoc
--- a/hardware/sch/VALVEBOARD_ValveDrive1.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValveDrive1.SchDoc
--- a/hardware/sch/VALVEBOARD_ValveDrive2.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValveDrive2.SchDoc
--- a/hardware/sch/VALVEBOARD_ValveDrive3.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValveDrive3.SchDoc
--- a/hardware/sch/VALVEBOARD_ValveDrive4.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValveDrive4.SchDoc
--- a/hardware/sch/VALVEBOARD_ValveInterface.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValveInterface.SchDoc
--- a/hardware/sch/VALVEBOARD_ValvePower.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValvePower.SchDoc
--- a/hardware/sch/VALVEBOARD_ValvePower_ValveInterface.SchDoc
+++ b/hardware/sch/VALVEBOARD_ValvePower_ValveInterface.SchDoc
--- a/hardware/sch/ValveBoard
+++ b/hardware/sch/ValveBoard
@ -1,4 +1,4 @@
-|RECORD=BOM|VERSION=2|FILENAME=D:\guoyiren\valveboard\hardware\sch\ValveBoard - Copy.$$$|KIND=ALTIUM_DESIGNER_LIVEBOM|DATE=19.05.2022|TIME=14:59:10|CURRENCY=USD|PRODUCTIONQUANTITY=1|PERUNITTARGETPRICE=0|PERUNITACTUALPRICE=0
+|RECORD=BOM|VERSION=2|FILENAME=C:\Users\guoyr\Desktop\valveboard\hardware\sch\ValveBoard - Copy.$$$|KIND=ALTIUM_DESIGNER_LIVEBOM|DATE=11.07.2022|TIME=15:07:40|CURRENCY=USD|PRODUCTIONQUANTITY=1|PERUNITTARGETPRICE=0|PERUNITACTUALPRICE=0
 |RECORD=GeneralOptions|OPENEXPORTED=False|ADDTOPROJECT=False|FORCEFIT=False|NOTFITTED=False|TEMPLATEFILENAME=|BATCHMODE=0|SUPPLIERPRODQTY=0|SUPPLIERAUTOQTY=False|SUPPLIERUSECACHEDPRICING=False|SUPPLIERCURRENCY=|SOLUTIONSPERITEM=1|SUPPLIERSPERSOLUTION=1|DISPLAYTOTALROW=False|DISPLAYSUBTOTALSFORGROUPS=False|INCLUDEPCBPARAMETERS=False|INCLUDEDBPARAMETERS=False|INCLUDEVAULTPARAMETERS=False|INCLUDECLOUDPARAMETERS=False|INCLUDEDOCUMENTPARAMETERS=False|FILTEROUTRISKYSOLUTIONS=True|DESIGNATORGROUPING=No
 |RECORD=SortOrderOptions|SORTORDER=
 |RECORD=GroupOrderOptions|GROUPORDER=
@ -13,103 +13,110 @@
 |RECORD=CheckOptions|CHECKLEVELS=
 |RECORD=LineNumberingOptions|STARTVALUE=|INCREMENT=
 |RECORD=Catalog|DBLINKFILEPATH=
-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=1|SELECTEDPARAMETERSHASH=,100nF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=100nF,voltage=25V|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=1|SELECTEDPARAMETERSHASH=,100nF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,"Signal Integrity=",Simulation=,value=100nF,voltage=25V|CUSTOMPARAMETERS=
 |RECORD=PartChoiceGroups|GROUPBYFIELDCOUNT=0
-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=2|SELECTEDPARAMETERSHASH=,47uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0805,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=47uF,voltage=25V|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=2|SELECTEDPARAMETERSHASH=,47uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0805,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,"Signal Integrity=",Simulation=,value=47uF,voltage=25V|CUSTOMPARAMETERS=
 |RECORD=PartChoiceGroups|GROUPBYFIELDCOUNT=0
-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=3|SELECTEDPARAMETERSHASH=,10uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0805,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=10uF,voltage=25V|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=3|SELECTEDPARAMETERSHASH=,10uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0805,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,"Signal Integrity=",Simulation=,value=10uF,voltage=25V|CUSTOMPARAMETERS=
 |RECORD=PartChoiceGroups|GROUPBYFIELDCOUNT=0
-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=4|SELECTEDPARAMETERSHASH=,4.7uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0805,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=4.7uF,voltage=25V|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=4|SELECTEDPARAMETERSHASH=,4.7uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0805,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,"Signal Integrity=",Simulation=,value=4.7uF,voltage=25V|CUSTOMPARAMETERS=
 |RECORD=PartChoiceGroups|GROUPBYFIELDCOUNT=0
-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=5|SELECTEDPARAMETERSHASH=,10n,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=10n,voltage=25V|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=5|SELECTEDPARAMETERSHASH=,10n,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,"Signal Integrity=",Simulation=,value=10n,voltage=25V|CUSTOMPARAMETERS=
 |RECORD=PartChoiceGroups|GROUPBYFIELDCOUNT=0
-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=6|SELECTEDPARAMETERSHASH=,8200pF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=8200pF,voltage=25V|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=6|SELECTEDPARAMETERSHASH=,8200pF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,"Signal Integrity=",Simulation=,value=8200pF,voltage=25V|CUSTOMPARAMETERS=
 |RECORD=PartChoiceGroups|GROUPBYFIELDCOUNT=0
-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=7|SELECTEDPARAMETERSHASH=,0.1uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=0.1uF,voltage=25V|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=8|SELECTEDPARAMETERSHASH=,1uF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=1uF,voltage=25V|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-NOMO|DESIGNITEMID=C-NOMO|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=C-NOMO|NOTE=|LINENUMBER=9|SELECTEDPARAMETERSHASH=,1nF,C-NOMO|COMPONENTPARAMETERS=Comment=C-NOMO,"Component Kind=Standard",Description=,Footprint=C0402,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-NOMO",PCB3D=,"Pin Info=",precision=5%,Simulation=,value=1nF,voltage=25V|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\C-POL|DESIGNITEMID=C-POL|ITEMSOURCE=zynq.SchLib|STATUS=Ambiguous component|DESCRIPTION=|USERCOMMENTS=C-POL|NOTE=|LINENUMBER=10|SELECTEDPARAMETERSHASH=,470uF,C-POL|COMPONENTPARAMETERS=Comment=C-POL,"Component Kind=Standard",Description=,Footprint=C_10_10R2,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=C-POL",PCB3D=,"Pin Info=",Simulation=,value=470uF,voltage=35V|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\LED|DESIGNITEMID=LED|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=LED|NOTE=|LINENUMBER=11|SELECTEDPARAMETERSHASH=,LED|COMPONENTPARAMETERS=Comment=LED,"Component Kind=Standard",Description=,Footprint=LED0603,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=LED",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\FM4007|DESIGNITEMID=FM4007|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=FM4007|NOTE=|LINENUMBER=12|SELECTEDPARAMETERSHASH=,FM4007|COMPONENTPARAMETERS=Comment=FM4007,"Component Kind=Standard",Description=,Footprint=FM4007-T(A7),"Ibis Model=","Library Name=zynq.SchLib","Library Reference=FM4007",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\DIOD1|DESIGNITEMID=DIOD1|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=1N4148|NOTE=|LINENUMBER=13|SELECTEDPARAMETERSHASH=,1N4148|COMPONENTPARAMETERS=Comment=1N4148,"Component Kind=Standard",Description=,Footprint=sod-123,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=DIOD1",PCB3D=,"Pin Info=","Signal Integrity=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\DIOD1|DESIGNITEMID=DIOD1|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=1N4148|NOTE=|LINENUMBER=13|SELECTEDPARAMETERSHASH=,1N4148|COMPONENTPARAMETERS=Comment=1N4148,"Component Kind=Standard",Description=,Footprint=1N4148,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=DIOD1",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\DIOD1|DESIGNITEMID=DIOD1|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=1N4007|NOTE=|LINENUMBER=14|SELECTEDPARAMETERSHASH=,1N4007|COMPONENTPARAMETERS=Comment=1N4007,"Component Kind=Standard",Description=,Footprint=1N4148,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=DIOD1",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\HDR1X2|DESIGNITEMID=HDR1X2|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=HDR1X2|NOTE=|LINENUMBER=16|SELECTEDPARAMETERSHASH=,HDR1X2|COMPONENTPARAMETERS=Comment=HDR1X2,"Component Kind=Standard",Description=,Footprint=KF301-5.0-2P,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=HDR1X2",PCB3D=,"Pin Info=","Signal Integrity=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\F50|DESIGNITEMID=F50|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=F50|NOTE=|LINENUMBER=15|SELECTEDPARAMETERSHASH=,F50|COMPONENTPARAMETERS=Comment=F50,"Component Kind=Standard",Description=,Footprint=F-TH2,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=F50",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\HDR2X5|DESIGNITEMID=HDR2X5|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=HDR2X5|NOTE=|LINENUMBER=17|SELECTEDPARAMETERSHASH=,HDR2X5|COMPONENTPARAMETERS=Comment=HDR2X5,"Component Kind=Standard",Description=,Footprint=HDR2X5-NJ,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=HDR2X5",PCB3D=,"Pin Info=","Signal Integrity=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\HDR1X2|DESIGNITEMID=HDR1X2|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=HDR1X2|NOTE=|LINENUMBER=16|SELECTEDPARAMETERSHASH=,HDR1X2|COMPONENTPARAMETERS=Comment=HDR1X2,"Component Kind=Standard",Description=,Footprint=KF301-5.0-2P,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=HDR1X2",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\HDR2X5|DESIGNITEMID=HDR2X5|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=HDR2X5|NOTE=|LINENUMBER=17|SELECTEDPARAMETERSHASH=,HDR2X5|COMPONENTPARAMETERS=Comment=HDR2X5,"Component Kind=Standard",Description=,Footprint=HDR2X5-NJ,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=HDR2X5",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\HDR1X4|DESIGNITEMID=HDR1X4|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=HDR1X4|NOTE=|LINENUMBER=19|SELECTEDPARAMETERSHASH=,HDR1X4|COMPONENTPARAMETERS=Comment=HDR1X4,"Component Kind=Standard",Description=,Footprint=KF301-5.0-4P,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=HDR1X4",PCB3D=,"Pin Info=","Signal Integrity=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\RJ45-UP|DESIGNITEMID=RJ45-UP|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=GE-8|NOTE=|LINENUMBER=18|SELECTEDPARAMETERSHASH=,GE-8|COMPONENTPARAMETERS=Comment=GE-8,"Component Kind=Standard",Description=,Footprint=RJ45-UP,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=RJ45-UP",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\HDR1X4|DESIGNITEMID=HDR1X4|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=HDR1X4|NOTE=|LINENUMBER=19|SELECTEDPARAMETERSHASH=,HDR1X4|COMPONENTPARAMETERS=Comment=HDR1X4,"Component Kind=Standard",Description=,Footprint=KF301-5.0-4P,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=HDR1X4",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\HDR1X8|DESIGNITEMID=HDR1X8|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=HDR1X8|NOTE=|LINENUMBER=20|SELECTEDPARAMETERSHASH=,HDR1X8|COMPONENTPARAMETERS=Comment=HDR1X8,"Component Kind=Standard",Description=,Footprint=KF15EDGK-3.81-8P,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=HDR1X8",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\L|DESIGNITEMID=L|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=L|NOTE=|LINENUMBER=22|SELECTEDPARAMETERSHASH=,3.3uH,L|COMPONENTPARAMETERS=Code_IEC=1005,Code_JEITA=0402,Comment=L,"Component Kind=Standard",Description=,Footprint=FXL0624,"Ibis Model=",LatestRevisionDate=29-May-2009,"LatestRevisionNote=IPC-7351 Footprint Added.","Library Name=zynq.SchLib","Library Reference=L","PackageDescription=Chip Inductor",PackageReference=0402-A,PCB3D=,"Pin Info=",Published=8-Jun-2000,"Publisher=Altium Limited","Signal Integrity=",Simulation=,Value=3.3uH|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\KEY|DESIGNITEMID=KEY|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=KEY|NOTE=|LINENUMBER=21|SELECTEDPARAMETERSHASH=,KEY|COMPONENTPARAMETERS=Comment=KEY,"Component Kind=Standard",Description=,Footprint=KEY735SO,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=KEY",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\MARKPOINT|DESIGNITEMID=MARKPOINT|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=MARKPOINT|NOTE=|LINENUMBER=23|SELECTEDPARAMETERSHASH=,MARKPOINT|COMPONENTPARAMETERS=Comment=MARKPOINT,"Component Kind=Standard",Description=,Footprint=MARKPOINT-1.0,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=MARKPOINT",PCB3D=,"Pin Info=","Signal Integrity=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\L|DESIGNITEMID=L|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=L|NOTE=|LINENUMBER=22|SELECTEDPARAMETERSHASH=,3.3uH,L|COMPONENTPARAMETERS=Code_IEC=1005,Code_JEITA=0402,Comment=L,"Component Kind=Standard",Description=,Footprint=FXL0624,"Ibis Model=",LatestRevisionDate=29-May-2009,"LatestRevisionNote=IPC-7351 Footprint Added.","Library Name=zynq.SchLib","Library Reference=L","PackageDescription=Chip Inductor",PackageReference=0402-A,PCB3D=,"Pin Info=",Published=8-Jun-2000,"Publisher=Altium Limited",Simulation=,Value=3.3uH|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\MARKPOINT|DESIGNITEMID=MARKPOINT|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=MARKPOINT|NOTE=|LINENUMBER=23|SELECTEDPARAMETERSHASH=,MARKPOINT|COMPONENTPARAMETERS=Comment=MARKPOINT,"Component Kind=Standard",Description=,Footprint=MARKPOINT-1.0,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=MARKPOINT",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
+|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\IRF9640|DESIGNITEMID=IRF9640|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=P-Channel Power MOSFET|USERCOMMENTS=IRF9640|NOTE=|LINENUMBER=25|SELECTEDPARAMETERSHASH=IRF9640,"P-Channel Power MOSFET"|COMPONENTPARAMETERS=Comment=IRF9640,"Component Kind=Standard","ComponentLink1Description=Manufacturer Link",ComponentLink1URL=http://www.irf.com/,DatasheetVersion=PD-9.390D,"Description=P-Channel Power MOSFET",Footprint=TO-220AB,"Ibis Model=",LatestRevisionDate=17-Jul-2002,"LatestRevisionNote=Re-released for DXP Platform.","Library Name=zynq.SchLib","Library Reference=IRF9640","Note=Pin 4 not drawn and electrically connected to Pin 2.","PackageDescription=TO, Thru-Hole, Vertical, Heatsink Mounted; 3 In-Line Leads; Pitch 2.54 mm",PackageReference=TO-220AB,PackageVersion=Feb-1997,PCB3D=,"Pin Info=",Published=8-Jun-2000,"Publisher=Altium Limited","Signal Integrity=",Simulation=IRF9510|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\POSHOLE|DESIGNITEMID=POSHOLE|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=|USERCOMMENTS=POSHOLE|NOTE=|LINENUMBER=24|SELECTEDPARAMETERSHASH=,POSHOLE|COMPONENTPARAMETERS=Comment=POSHOLE,"Component Kind=Standard",Description=,Footprint=POSHOLE-3.2,"Ibis Model=","Library Name=zynq.SchLib","Library Reference=POSHOLE",PCB3D=,"Pin Info=",Simulation=|CUSTOMPARAMETERS=
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-|RECORD=CatalogItem|ITEMTYPE=Automatic-NonVault|UNIQUEID=zynq.SchLib\IRF9640|DESIGNITEMID=IRF9640|ITEMSOURCE=zynq.SchLib|STATUS=Unknown|DESCRIPTION=P-Channel Power MOSFET|USERCOMMENTS=IRF9640|NOTE=|LINENUMBER=25|SELECTEDPARAMETERSHASH=IRF9640,"P-Channel Power MOSFET"|COMPONENTPARAMETERS=Comment=IRF9640,"Component Kind=Standard","ComponentLink1Description=Manufacturer Link",ComponentLink1URL=http://www.irf.com/,DatasheetVersion=PD-9.390D,"Description=P-Channel Power MOSFET",Footprint=TO-220AB,"Ibis Model=",LatestRevisionDate=17-Jul-2002,"LatestRevisionNote=Re-released for DXP Platform.","Library Name=zynq.SchLib","Library Reference=IRF9640","Note=Pin 4 not drawn and electrically connected to Pin 2.","PackageDescription=TO, Thru-Hole, Vertical, Heatsink Mounted; 3 In-Line Leads; Pitch 2.54 mm",PackageReference=TO-220AB,PackageVersion=Feb-1997,PCB3D=,"Pin Info=",Published=8-Jun-2000,"Publisher=Altium Limited",Simulation=IRF9510|CUSTOMPARAMETERS=
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--- a/protocol/README.md
+++ b/protocol/README.md
@ -68,6 +68,9 @@ DS90LV048具有内置终端电阻，电路设计和布局布线只需注意匹
 ![image-20211109201037196](./README.assets/image-20211109201037196.png)

 ##  作者
+[过奕任](https://github.com/3703781)、丁坤。老阀板的协议不明确（其实就没有协议，逆向工程后改进出来的这份协议），所以就大概描述了一下协议相关信息。欢迎提[issue](https://github.com/NanjingForestryUniversity/valveboard/issues)，bug随缘解决。

-**丁坤，2019年9月入学、丁坤QQ1091546069、丁坤电话17761700156**，他觉得老阀板的协议不明确（其实就没有协议，逆向工程后改进出来的这份协议），所以就大概描述了一下协议相关信息，无论有没有毕业，都很乐意解答关于这份协议的所有问题
+过奕任2020年入学，目前正打算找其他人接管这个库，毕业了就不要找他，但永远可以找丁坤。
+
+丁坤2019年入学虽然已经毕业，但也很乐意解答关于这份协议的所有问题。丁坤QQ1091546069、丁坤电话17761700156。

--- a/protocol/阀板通信协议.pdf
+++ b/protocol/阀板通信协议.pdf
Author	SHA1	Message	Date
MIAOW	39bb13a2ff	更新了版本说明	2022-08-31 14:53:55 +08:00
Miaow	6201402bb4	确认了不需要长时间开启保护 issue#6	2022-08-31 14:46:32 +08:00
Miaow	6af8dfd09c	每路阀添加单独的开启超时机制改动了固件	2022-08-24 22:10:11 +08:00
Miaow	054f1e9495	固件中添加了高电压抑制如果阀已经是开的，就不再施加加速开启的高电压	2022-08-24 13:27:43 +08:00
Miaow	89bf50ea46	整理了原理图修改了PCB 1. 添加了防反接电路 2. 删除了保险丝 3. 增大了喷阀走线载流能力	2022-07-26 20:47:43 +08:00